CY62147EV30 MoBL
®
4-Mbit (256K × 16) Static RAM
4-Mbit (256K × 16) Static RAM
Features
■
Very high speed: 45 ns
■
Temperature ranges
❐
Industrial: –40 °C to +85 °C
■
Wide voltage range: 2.20 V to 3.60 V
■
Pin compatible with CY62147DV30
■
Ultra low standby power
❐
Typical standby current: 1
A
❐
Maximum standby current: 7
A
(Industrial)
■
Ultra low active power
❐
Typical active current: 2 mA at f = 1 MHz
[1]
and OE features
■
Easy memory expansion with CE
■
■
■
portable applications such as cellular telephones. The device
also has an automatic power down feature that significantly
reduces power consumption when addresses are not toggling.
Placing the device into standby mode reduces power
consumption by more than 99 percent when deselected (CE
HIGH or both BLE and BHE are HIGH). The input and output pins
(I/O
0
through I/O
15
) are placed in a high impedance state when:
■
■
■
■
Deselected (CE HIGH)
Outputs are disabled (OE HIGH)
Both Byte High Enable and Byte Low Enable are disabled
(BHE, BLE HIGH)
Write operation is active (CE LOW and WE LOW)
Automatic power-down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
Available in Pb-free 48-ball very fine ball grid array (VFBGA)
(single/dual CE option) and 44-pin thin small outline package
(TSOP) II packages
Byte power-down feature
■
Functional Description
The CY62147EV30 is a high performance CMOS static RAM
(SRAM) organized as 256K words by 16 bits. This device
features advanced circuit design to provide ultra low active
current. It is ideal for providing More Battery Life™ (MoBL
) in
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (I/O
0
through I/O
7
) is written into the location
specified on the address pins (A
0
through A
17
). If Byte High
Enable (BHE) is LOW, then data from I/O pins (I/O
8
through
I/O
15
) is written into the location specified on the address pins
(A
0
through A
17
).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low enable (BLE) is LOW, then data from the memory
location specified by the address pins appear on I/O
0
to I/O
7
. If
Byte High enable (BHE) is LOW, then data from memory appears
on I/O
8
to I/O
15
. See the
Truth Table on page 11
for a complete
description of read and write modes.
For a complete list of related documentation,
click here.
Logic Block Diagram
DATA IN DRIVERS
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
ROW DECODER
256K x 16
RAM Array
SENSE AMPS
I/O
0
–I/O
7
I/O
8
–I/O
15
COLUMN DECODER
POWER DOWN
CIRCUIT
CE
A
12
A
13
A
14
A
15
Note
1. BGA packaged device is offered in single CE and dual CE options. In this data sheet, for a dual CE device, CE refers to the internal logical combination of CE
1
and
CE
2
such that when CE
1
is LOW and CE
2
is HIGH, CE is LOW. For all other cases CE is HIGH.
A
11
A
16
A
17
BHE
BLE
BHE
WE
[1]
CE
OE
BLE
Cypress Semiconductor Corporation
Document Number: 38-05440 Rev. *Q
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised September 22, 2016
CY62147EV30 MoBL
®
Contents
Product Portfolio .............................................................. 3
Pin Configurations ........................................................... 3
Maximum Ratings ............................................................. 4
Operating Range ............................................................... 4
Electrical Characteristics ................................................. 4
Capacitance ...................................................................... 5
Thermal Resistance .......................................................... 5
AC Test Load and Waveforms ......................................... 5
Data Retention Characteristics ....................................... 6
Data Retention Waveform ................................................ 6
Switching Characteristics ................................................ 7
Switching Waveforms ...................................................... 8
Truth Table ...................................................................... 11
Ordering Information ...................................................... 12
Ordering Code Definitions ......................................... 12
Package Diagrams .......................................................... 13
Acronyms ........................................................................ 15
Document Conventions ................................................. 15
Units of Measure ....................................................... 15
Document History Page ................................................. 16
Sales, Solutions, and Legal Information ...................... 18
Worldwide Sales and Design Support ....................... 18
Products .................................................................... 18
PSoC®Solutions ....................................................... 18
Cypress Developer Community ................................. 18
Technical Support ..................................................... 18
Document Number: 38-05440 Rev. *Q
Page 2 of 18
CY62147EV30 MoBL
®
Product Portfolio
Power Dissipation
Product
Range
Min
CY62147EV30LL
Industrial
2.2
V
CC
Range (V)
Typ
[2]
3.0
Max
3.6
45
Speed
(ns)
Typ
[2]
2
Operating I
CC
(mA)
f = 1 MHz
Max
2.5
f = f
max
Typ
[2]
15
Max
20
Standby I
SB2
(A)
Typ
[2]
1
Max
7
Pin Configurations
Figure 1. 48-ball VFBGA pinout (Single Chip Enable)
[3, 4]
1
BLE
I/O
8
I/O
9
2
OE
BHE
I/O
10
3
A
0
A
3
A
5
A
17
NC
4
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
5
A
2
CE
I/O
1
I/O
3
I/O
4
I/O
5
WE
A
11
6
NC
I/O
0
I/O
2
V
CC
V
SS
I/O
6
I/O
7
NC
A
B
C
D
E
F
G
H
Figure 2. 48-ball VFBGA pinout (Dual Chip Enable)
[3, 4]
1
BLE
I/O
8
I/O
9
2
OE
BHE
I/O
10
3
A
0
A
3
A
5
A
17
NC
4
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
5
A
2
CE
1
I/O
1
I/O
3
I/O
4
I/O
5
WE
A
11
6
CE
2
I/O
0
I/O
2
V
CC
V
SS
I/O
6
I/O
7
NC
A
B
C
D
E
F
G
H
V
SS
I/O
11
V
CC
I/O
12
V
SS
I/O
11
V
CC
I/O
12
I/O
14
I/O
13
A
14
I/O
15
NC
NC
A
8
A
12
A
9
I/O
14
I/O
13
A
14
I/O
15
NC
NC
A
8
A
12
A
9
Figure 3. 44-pin TSOP II pinout
[3]
A
4
A
3
A
2
A
1
A
0
CE
I/O
0
I/O
1
I/O
2
I/O
3
V
CC
V
SS
I/O
4
I/O
5
I/O
6
I/O
7
WE
A
17
A
16
A
15
A
14
A
13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A
5
A
6
A
7
OE
BHE
BLE
I/O
15
I/O
14
I/O
13
I/O
12
V
SS
V
CC
I/O
11
I/O
10
I/O
9
I/O
8
NC
A
8
A
9
A
10
A
11
A
12
Notes
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
3. NC pins are not connected on the die.
4. Pins H1, G2, and H6 in the BGA package are address expansion pins for 8 Mb, 16 Mb, and 32 Mb, respectively.
Document Number: 38-05440 Rev. *Q
Page 3 of 18
CY62147EV30 MoBL
®
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. User guidelines are not tested.
Storage temperature ............................... –65 °C to + 150 °C
Ambient temperature
with power applied ................................... –55 °C to +125 °C
Supply voltage
to ground potential ........ –0.3 V to + 3.9 V (V
CC(max)
+ 0.3 V)
DC voltage applied to outputs
in High Z state
[5, 6]
.......... –0.3 V to 3.9 V (V
CC(max)
+ 0.3 V)
DC input voltage
[5, 6]
....... –0.3 V to 3.9 V (V
CC(max)
+ 0.3 V)
Output current into outputs (LOW) ............................. 20 mA
Static discharge voltage
(MIL-STD-883, method 3015) ................................ > 2001 V
Latch-up current .................................................... > 200 mA
Operating Range
Device
Range
Ambient
Temperature
V
CC
[7]
CY62147EV30LL Industrial –40 °C to +85 °C 2.2 V to 3.6 V
Electrical Characteristics
Over the Operating Range
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
I
SB1[9]
Description
Output HIGH voltage
Output LOW voltage
Input HIGH voltage
Input LOW voltage
Input leakage current
Output leakage current
V
CC
operating supply
current
Test Conditions
I
OH
= –0.1 mA
I
OH
= –1.0 mA, V
CC
> 2.70 V
I
OL
= 0.1 mA
I
OL
= 2.1 mA, V
CC
= 2.70 V
V
CC
= 2.2 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 2.2 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
GND < V
I
< V
CC
GND < V
O
< V
CC
, output disabled
f = f
max
= 1/t
RC
f = 1 MHz
V
CC
= V
CC(max)
I
OUT
= 0 mA
CMOS levels
45 ns (Industrial)
Min
2.0
2.4
–
–
1.8
2.2
–0.3
–0.3
–1
–1
–
–
–
Typ
[8]
–
–
–
–
–
–
–
–
–
–
15
2
1
Max
–
–
0.4
0.4
V
CC
+ 0.3
V
CC
+ 0.3
0.6
0.8
+1
+1
20
2.5
7
A
Unit
V
V
V
V
V
V
V
V
A
A
mA
Automatic CE power-down CE > V
CC
– 0.2 V,
current – CMOS inputs
V
IN
> V
CC
– 0.2 V, V
IN
< 0.2 V,
f = f
max
(address and data only),
f = 0 (OE, BHE, BLE and WE),
V
CC
= 3.60 V
Automatic CE power-down CE > V
CC
– 0.2 V,
current – CMOS inputs
V
IN
> V
CC
– 0.2 V or V
IN
< 0.2 V,
f = 0, V
CC
= 3.60 V
I
SB2 [9]
–
1
7
A
Notes
5. V
IL(min)
= –2.0 V for pulse durations less than 20 ns.
6. V
IH(max)
= V
CC
+ 0.75 V for pulse durations less than 20 ns.
7. Full device AC operation assumes a minimum of 100
s
ramp time from 0 to V
CC(min)
and 200
s
wait time after V
CC
stabilization.
8. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
9. Chip enable (CE) and byte enables (BHE and BLE) need to be tied to CMOS levels to meet the I
SB1
/ I
SB2
/ I
CCDR
spec. Other inputs can be left floating.
Document Number: 38-05440 Rev. *Q
Page 4 of 18
CY62147EV30 MoBL
®
Capacitance
Parameter
[10]
C
IN
C
OUT
Description
Input capacitance
Output capacitance
Test Conditions
T
A
= 25 °C, f = 1 MHz, V
CC
= V
CC(typ)
Max
10
10
Unit
pF
pF
Thermal Resistance
Parameter
[10]
JA
JC
Description
Thermal resistance
(junction to ambient)
Thermal resistance
(junction to case)
Test Conditions
Still Air, soldered on a 3 × 4.5 inch,
two-layer printed circuit board
48-ball VFBGA 44-pin TSOP II Unit
Package
Package
42.10
23.45
55.52
16.03
C/W
C/W
AC Test Load and Waveforms
Figure 4. AC Test Load and Waveforms
R1
V
CC
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
R2
V
CC
10%
GND
Rise Time = 1 V/ns
ALL INPUT PULSES
90%
90%
10%
Fall Time = 1 V/ns
Equivalent to: THEVENIN EQUIVALENT
R
TH
OUTPUT
V
TH
Parameters
R1
R2
R
TH
V
TH
2.50 V
16667
15385
8000
1.20
3.0 V
1103
1554
645
1.75
Unit
V
Note
10. Tested initially and after any design or process changes that may affect these parameters.
Document Number: 38-05440 Rev. *Q
Page 5 of 18
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