2N7002K
60V N-Channel Enhancement Mode MOSFET - ESD Protected
FEATURES
• R
DS(ON)
, V
GS
@10V,I
DS
@500mA=3Ω
• R
DS(ON)
, V
GS
@4.5V,I
DS
@200mA=4Ω
• Advanced Trench Process Technology
• High Density Cell Design For Ultra Low On-Resistance
• Very Low Leakage Current In Off Condition
• Specially Designed for Battery Operated Systems, Solid-State Relays
Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc.
• ESD Protected 2KV HBM
• In compliance with EU RoHS 2002/95/EC directives
MECHANICALDATA
• Case: SOT-23 Package
• Terminals : Solderable per MIL-STD-750,Method 2026
• Marking : K72
• Approx. Weight: 0.008gram
Maximum RATINGS and Thermal Characteristics (T
A
=25
O
C unless otherwise noted )
PA RA M E TE R
D r a i n- S o ur c e Vo l t a g e
G a t e - S o ur c e Vo l t a g e
C o nt i nuo us D r a i n C ur r e nt
P ul s e d D r a i n C ur r e nt
1)
S ym b o l
V
DS
V
GS
I
D
I
D M
P
D
T
J
, T
S TG
R
θ
J A
Li mi t
60
+20
300
2000
350
210
-5 5 to + 1 5 0
357
U ni t s
V
V
mA
mA
mW
O
T
A
= 2 5
O
C
T
A
= 7 5
O
C
O p e r a t i n g J u n c t i o n a n d S t o r a g e Te m p e r a t u r e
R a ng e
M a xi m um P o w e r D i s s i p a t i o n
Junction-to Ambient Thermal Resistance(PCB mounted)
2
C
O
C /W
Note: 1. Maximum DC current limited by the package
2. Surface mounted on FR4 board, t < 5 sec
PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE
REV.0.1-FEB.3.2009
PAGE . 1
2N7002K
ELECTRICALCHARACTERISTICS
P a ra me te r
S ta ti c
D r a i n- S o ur c e B r e a k d o w n
Vo lta g e
G a t e Thr e s ho l d Vo l t a g e
D r a i n- S o ur c e O n- S t a t e
R e s i s t a nc e
D r a i n- S o ur c e O n- S t a t e
R e s i s t a nc e
Ze r o Ga te Vo lta g e D r a i n
C ur r e nt
Gate Body Leakage
Forward Transconductance
Dynamic
To t a l G a t e C h a r g e
Tu r n - O n Ti m e
Tu r n - O f f Ti m e
In p u t C a p a c i t a n c e
O ut p ut C a p a c i t a nc e
R e v e r s e Tr a n s f e r
C a p a c i t a nc e
S o ur c e - D r a i n D i o d e
D i o d e F o rwa rd Vo lta g e
C o nt i nuo us D i o d e F o r w a r d
C ur r e nt
P ul s e D i o d e F o r w a r d
C ur r e nt
S ym b o l
Te s t C o n d i t i o n
M i n.
Ty p .
M a x.
U ni t s
B V
DSS
V
G S ( t h)
R
D S ( o n)
R
D S ( o n)
I
D S S
I
G S S
g
fS
V
G S
= 0 V , I
D
= 1 0 u A
V
D S
= V
G S
, I
D
= 2 5 0 u A
V
GS
=4.5V , I
D
=200mA
V
GS
=10V , I
D
=500mA
V
DS
=60V , V
GS
=0V
V
G S
=+ 2 0 V , V
D S
= 0 V
V
D S
= 1 5 V , I
D
= 2 5 0 m A
60
1
-
-
-
-
100
-
-
-
-
-
-
-
-
2 .5
4 .0
V
V
Ω
3.0
1
+10
-
uA
uA
mS
Q
g
t
on
t
o ff
C
iss
C
oss
C
rss
V
D S
= 1 5 V , I
D
= 2 0 0 m A
V
GS
=5V
V
DD
=30V , R
L
=150
Ω
I
D
=200mA , V
GEN
=10V
R
G
=10
Ω
-
-
-
-
-
-
-
-
-
-
0 .8
20
nC
ns
40
35
10
5
pF
V
D S
= 2 5 V , V
GS
= 0 V
f=1 .0 MH
Z
-
-
V
SD
I
S
I
S M
I
S
=200mA , V
GS
=0V
-
-
-
-
-
0.82
-
-
1.3
300
2000
V
mA
mA
Switching
Test Circuit
V
IN
V
DD
R
L
V
OUT
Gate Charge
Test Circuit
V
GS
V
DD
R
L
R
G
1mA
R
G
REV.0.1-FEB.3.2009
PAGE . 2
2N7002K
Typical Characteristics Curves (T
A
=25
O
C,unless otherwise noted)
I
D
- Drain-to-Source Current (A)
V
GS
= 10V ~ 6.0V
1
5.0V
4.0V
I
D
- Drain Source Current (A)
1.2
1.2
1
0.8
0.6
0.4
V
DS
=10V
0.8
0.6
0.4
3.0V
0
0
1
2
3
4
5
T
J
=25
0.2
0
0
1
2
3
4
5
6
0.2
V
DS
- Drain-to-Source Voltage (V)
V
GS
- Gate-to-Source Voltage (V)
Fig. 1-TYPICAL FORWARD CHARACTERISTIC
FIG.1- Output Characteristic
FIG.2- Transfer Characteristic
5
5
R
DS(ON)
- On-Resistance (
W
)
R
DS(ON)
- On-Resistance (
W
)
4
3
2
1
0
4
3
V
GS
=4.5V
V
GS
=10V
I
D
=500mA
2
1
I
D
=200mA
0
0
0.2
0.4
0.6
0.8
1
2
3
4
5
6
7
8
9
10
I
D
- Drain Current (A)
V
GS
- Gate-to-Source Voltage (V)
FIG.3- On Resistance vs Drain Current
FIG.4- On Resistance vs Gate to Source Voltage
R
DS(ON)
- On-Resistance(Normalized)
1.8
V
GS
=10V
I
D
=500mA
1.6
1.4
1.2
1
0.8
0.6
-50
-25
0
25
50
75
100
125
150
T
J
- Junction Temperature (
o
C)
FIG.5- On Resistance vs Junction Temperature
REV.0.1-FEB.3.2009
PAGE . 3
2N7002K
10
Vgs
Qg
V
GS
- Gate-to-Source Voltage (V)
8
6
4
2
0
V
DS
=10V
I
D
=250mA
Vgs(th)
Qsw
Qg(th)
Qgs
Qgd
0
0.2
0.4
0.6
0.8
1
Qg
Q
g
- Gate Charge (nC)
Fig.6 - Gate Charge Waveform
V
th
- G-S Threshold Voltage (NORMALIZED)
Fig.7 - Gate Charge
88
86
84
82
80
78
76
74
72
-50
I
D
=250uA
BV
DSS
- Breakdown Voltage (V)
1.2
1.1
1
0.9
0.8
0.7
-50
I
D
=250uA
-25
0
25
50
75
100
125
150
-25
0
25
50
75
100
125
150
T
J
- Junction Temperature (
o
C)
T
J
- Junction Temperature (
o
C)
Fig.8 - Threshold Voltage vs Temperature
Fig.9 - Breakdown Voltage vs Junction Temperature
10
I
S
- Source Current (A)
V
GS
=0V
1
0.1
T
J
=125
25
-55
0.01
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
V
SD
- Source-to-Drain Voltage (V)
Fig.10 - Source-Drain Diode Forward Voltage
REV.0.1-FEB.3.2009
PAGE . 4
2N7002K
MOUNTING PAD LAYOUT
ORDER INFORMATION
• Packing information
T/R - 12K per 13" plastic Reel
T/R - 3K per 7” plastic Reel
LEGAL STATEMENT
Copyright PanJit International, Inc 2009
The information presented in this document is believed to be accurate and reliable. The specifications and information herein
are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its
products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit
does not convey any license under its patent rights or rights of others.
REV.0.1-FEB.3.2009
PAGE . 5
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