PJClamp0502Q
DUAL ULTRA LOW CAPACITANCE ESD PROTECTOR ARRAY
This Dual Unidirectional ESD Protector Array family have been designed to protect
sensitive equipment against ESD in high speed transmission buses, operating at
5V and demanding the lowest insertion loss. This array offers an integrated
solution to protect up to 2 data lines in applications, where the board space is a
premium, in a Quad Flat no-Lead package that only occupies an area of 1.8 sq mm.
6
5
PRELIMINARY
SPECIFICATION FEATURES
IEC61000-4-2 ESD 20kV air, 15kV Contact Compliance
Low Leakage Current, Maximum of 1µA at rated voltage
Maximum Capacitance of 1pF per device at 0Vdc 1MHz
Peak Power Dissipation of 40W 8/20µs Waveform
Quad Flat No Lead package QFN (1.2x1.5 sq mm, Height: 0.75mm)
Lead Free Package 100% Tin Plating, Matte finish
4
1
1
2
3
1
2
3
APPLICATIONS
USB2.0 and IEEE 1394 Firewire Ports
RF Power Amplifier Protection
RF/Antenna Circuits
6
5
4
QFN 1.2x1.5 sq mm
MAXIMUM RATINGS (Per Device)
Rating
Peak Pulse Power (8/20µs Waveform)
Peak Pulse Current (8/20µs Waveform)
ESD Voltage (HBM Per MIL STD883C - Method 3015-6)
Operating Temperature Range
Storage Temperature Range
Symbol
P
PP
I
PPM
V
ESD
TJ
T
stg
Value
40
3
25
-55 to +150
-55 to +150
Units
W
A
kV
°C
°C
ELECTRICAL CHARACTERISTICS (Per Device)
Tj = 25°C
Parameter
Reverse Stand-Off Voltage
Reverse Breakdown Voltage
Reverse Leakage Current
Clamping Voltage (8/20µs)
Off State Junction Capacitance
Symbol
V
WRM
V
BR
I
R
V
c
Cj
I
BR
= 1mA
V
R
= 5V
I pp = 3A
0 Vdc Bias f = 1MHz
between 4&2 or 6&2
Conditions
Min
Typical
Max
5
Units
V
V
6
1
12
1
µA
V
pF
1/25/2006
Page
1
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