SPN8822
Common-Drain Dual N-Channel
Enhancement Mode MOSFET
DESCRIPTION
The SPN8822 is the Common-Drain Dual N-Channel
logic enhancement mode power field effect transistors are
produced using high cell density , DMOS trench
technology. This high density process is especially
tailored to minimize on-state resistance. These devices
are particularly suited for low voltage application ,
notebook computer power management and other battery
powered circuits where high-side switching .
FEATURES
20V/8.0A,R
DS(ON)
= 24mΩ@V
GS
= 4.5V
20V/7.0A,R
DS(ON)
= 32mΩ@V
GS
= 2.5V
20V/3.0A,R
DS(ON)
= 42mΩ@V
GS
= 1.8V
Super high density cell design for extremely low
RDS (ON)
Exceptional on-resistance and maximum DC
current capability
TSSOP – 8P package design
APPLICATIONS
Power Management in Note book
Portable Equipment
Battery Powered System
DC/DC Converter
Load Switch
DSC
LCD Display inverter
PIN CONFIGURATION(SOP – 8P)
PART MARKING
2007/04/23
Ver.1
Page 1
SPN8822
Common-Drain Dual N-Channel
Enhancement Mode MOSFET
PIN DESCRIPTION
Pin
1
2
3
4
5
6
7
8
ORDERING INFORMATION
Part Number
SPN8822TS8RG
SPN8822TS8TG
※
SPN8822TS8RG : 13” Tape Reel ; Pb – Free
※
SPN8822TS8TG : Tube ; Pb – Free
ABSOULTE MAXIMUM RATINGS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Drain-Source Voltage
Gate –Source Voltage
Continuous Drain Current(T
J
=150
℃
)
Pulsed Drain Current
Continuous Source Current(Diode Conduction)
Power Dissipation
Operating Junction Temperature
Storage Temperature Range
Thermal Resistance-Junction to Ambient
Symbol
D1 / D2
S1
S1
G1
G2
S2
S2
D1 / D2
Description
Drain
Source
Source
Gate
Gate
Source
Source
Drain
Package
TSSOP- 8P
TSSOP- 8P
Part
Marking
8822
8822
Symbol
V
DSS
V
GSS
T
A
=25℃
T
A
=70℃
I
D
I
DM
I
S
T
A
=25℃
T
A
=70℃
P
D
T
J
T
STG
R
θJA
Typical
20
±12
Unit
V
V
A
A
A
W
℃
℃
℃/W
7.4
6.0
30
2.3
1.5
0.9
-55/150
-55/150
80
2007/04/23
Ver.1
Page 2
SPN8822
Common-Drain Dual N-Channel
Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Leakage Current
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Time
Turn-Off Time
Symbol
Conditions
Min.
Typ
Max.
Unit
V
(BR)DSS
V
GS
=0V,I
D
=250uA
V
GS(th)
V
DS
=V
GS
,I
D
=250uA
I
GSS
I
DSS
I
D(on)
R
DS(on)
gfs
V
SD
V
DS
=0V,V
GS
=±12V
V
DS
=20V,V
GS
=0V
V
DS
=20V,V
GS
=0V
T
J
=55℃
V
DS
≥5V,V
GS
=4.5V
V
GS
= 4.5V,I
D
=8.0A
V
GS
= 2.5V,I
D
=7.0A
V
GS
= 1.8V,I
D
=3.0A
V
DS
=15V,I
D
=5.0A
I
S
=1.0A,V
GS
=0V
20
0.4
1.0
±100
1
10
6
0.020
0.024
0.032
30
0.8
0.024
0.032
0.042
1.2
V
nA
uA
A
Ω
S
V
Q
g
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
DS
=10V,V
GS
=4.5V
I
D
≡5.0A
10
1.4
2.1
600
120
100
15
13
nC
V
DS
=10V,V
GS
=0V
f=1MHz
pF
25
60
65
40
ns
V
DD
=10V,R
L
=10Ω
I
D
≡1.0A,V
GEN
=4.5V
R
G
=6Ω
40
45
30
2007/04/23
Ver.1
Page 3
SPN8822
Common-Drain Dual N-Channel
Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
2007/04/23
Ver.1
Page 4
SPN8822
Common-Drain Dual N-Channel
Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
2007/04/23
Ver.1
Page 5
微控制器 MCU
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
