FM24C32A/64A
2-Wire Serial EEPROM
Data Sheet
Nov. 2009
Data Sheet
FM24C32A/64A 2-Wire Serial EEPROM
Ver 1.5
1
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FM24C32A/64A 2-Wire Serial EEPROM
Ver 1.5
Data Sheet
2
Description
The FM24C32A/64A provides 32,768/65,536 bits of serial
electrically erasable and programmable read-only memory
(EEPROM) organized as 4096/8192 words of 8 bits each.
The device’s cascadable feature allows up to 8 devices to
share a common 2-wire bus. The device is optimized for
use in many industrial and commercial applications where
low-power and low-voltage operations are essential.
Packaging Type
Features
Low Operation Voltage: V
CC
= 1.7V to 5.5V
Internally Organized: 4096 x 8, 8192 x 8
2-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise
Suppression
Bi-directional Data Transfer Protocol
1MHz (2.5V~5.5V) and 400 kHz (1.7V) Compatibility
Write Protect Pin for Hardware Data Protection
32-byte Page Write Modes (Partial Page Writes are
Allowed)
Self-timed Write Cycle (5 ms max)
High-reliability
–
Endurance: 1,000,000 Write Cycles
–
Data Retention: 100 Years
PDIP8, SOP8, TSSOP8 and TDFN8 Packages
(RoHS Compliant and Halogen-free)
Absolute Maximum Ratings
Operating Temperature
(Plastic Package)
Operating Temperature
(Module Package)
Storage Temperature
(Plastic Package)
Storage Temperature
(Module Package)
Voltage on Any Pin with Respect to
Ground
Maximum Operating Voltage
DC Output Current
-55°C to +125°C
-20°C to +60°C
-65°C to +150°C
-25°C to +70°C
-1.0V to +7.0V
6.25V
5.0 mA
Pin Configurations
Pin Name
A0~A2
SDA
SCL
WP
V
CC
GND
NC
Function
Device Address Inputs
Serial Data Input/Output
Serial Clock Input
Write Protect
Power Supply
Ground
Not Connect
*NOTICE: Stresses beyond those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions beyond those indicated in the operational
sections of this specification are not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device
reliability.
FM24C32A/64A 2-Wire Serial EEPROM
Ver 1.5
Data Sheet
3
Figure 1．Block Diagram
FM24C32A/64A 2-Wire Serial EEPROM
Ver 1.5
Data Sheet
4
Pin Description
SERIAL CLOCK (SCL):
The SCL input is used to
positive edge clock data into each EEPROM device
and negative edge clock data out of each device.
SERIAL DATA (SDA):
The SDA pin is bi-directional
for serial data transfer. This pin is open-drain driven
and may be wire-ORed with any number of other
open-drain or open-collector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0):
The A2,
A1 and A0 pins are device address inputs that are
hardwired or left not connected for hardware
compatibility with other FM24CXX
／
FM24CXX
devices. When the pins are hardwired, as many as
eight 32K/64K devices may be addressed on a
single bus system (device addressing is discussed in
detail under the Device Addressing section). If the
pins are left floating, the A2, A1 and A0 pins will be
internally pulled down to GND if the capacitive
coupling to the circuit board V
CC
plane is <3pF, if
coupling is >3pF, FMSH recommends connecting
the address pins to GND.
WRITE PROTECT (WP):
The FM24C32A/64A has a
Write Protect pin that provides hardware data
protection. The WP pin allows normal write operations
when connected to ground (GND). When the Write
Protect pin is connected to VCC, all write operations
to the memory are inhibited. If the pin is left floating,
the WP pin will be internally pulled down to GND if
the capacitive coupling to the circuit board Vcc plane
is <3pF. If coupling is >3pF, FMSH recommends
connecting the WP to GND. Switching WP to VCC
prior to a write operation creates a software write
protected function.
Write Protect Description
WP Pin Status
WP=V
CC
WP=GND
Part of the Memory Protected
FM24C32A
FM 24C64A
Full (32K) Memory
Full (64K) Memory
Normal Read/Write Operations
Memory Organization
FM24C32A, 32K SERIAL EEPROM:
Internally
organized with 128 pages of 32 bytes each, the
32K requires a 12-bit data word address for
random word addressing.
FM24C64A, 64K SERIAL EEPROM:
Internally
organized with 256 pages of 32 bytes each, the 64K
requires a 13-bit data word address for random word
addressing.
FM24C32A/64A 2-Wire Serial EEPROM
Ver 1.5
Data Sheet
5
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