Actual Size
OT Type for PECL/LVDS
Crystal Oscillator
FEATURE
1. Typical 7.5 × 5.0 × 1.9 mm 6 Pads Ceramic SMD package.
2. Tight symmetry (45 to 55%) available.
3. Low phase jitter. (Max: 0.3 pSec).
4. Complementary output.
5. Output frequency up to 320MHz.
6. Packing: Tape & Reel, 1000/3000 pcs per Reel.
RoHS Compliant Standard
ORDERING INFORMATION
Select option
XO Package Supply
(mm) Voltage(V)
Tri-State
Function
Freq.
Stability
(ppm)
Temp.
Range (ºC)
Output LOgic
and Symmetry
Oscillator Mode
Appearance
Lead Free
Dash
Freq.
(MHz)
1.27±0.2
3.81±0.2
5.0±0.2
2.0(Max.)
4.0
2.0
Crystal Oscillator
44
7.5×5
J : 2.5
E : 3.3
±
N : Normal F : RoHS
T : Input to
D : 25
I : -10~+60
L : PECL / 50±5%
-A : AT
± 50
C : -20~+70
V : LVDS / 50±5%
Fundamental
Pin2 (std.) G :
Compliant
R : Input to
H : 00
L :
-40~+85
±1
-T : AT
Pin1
3
rd
Overtone
(case by
NOT SELECTABLE
case)
BY CUSTOMER
XX.XXXXXX
O T
Example OTETGCLANF-156.250000
XO T-TYPE; V
DD
: 3.3V; with Tri-State, input to Pin2; Freq. Stability: ±50ppm; Temp Range: -20oC to +70oC; PECL output, Symmetry: 50±
5%; AT Fundamental; Normal Appearance; RoHS Compliant; Freq. 156.250000MHz.
* Not all combinations of options are available.
OUTLINE DRAWING
[ TOP VIEW ]
#6
7.5±0.2
#5
#4
Part Number
information
Frequency
Date Code
#1
Pin 1 Mark
#2
#3
#3
#2
5.08
#1
FREQ. STABILITY vs. TEMP. RANGE
[ BOTTOM VIEW ]
5.08 ± 0.2
#5
#4
#6
ppm
Temp.(°C)
I
C
L
-10~ +60
-20~ +70
D: ±25
G: ±50
-40~ +85
:Standard :Available (case by case)
:Not available
1.4±0.2
[ SIDE VIEW ]
Pin
#1
#2
#3
#4
#5
#6
1.8
Recommended soldering pattern
Function
NC / Tri-State
Tri-State / NC
GND
Output
Comp. Output
V
DD
UNIT : mm
www.taitien.com
Specifications subject to change without notice.
XO-0054-12 P.1/2
Jan. 1. 2008
TAITIEN
2008
Our Performance, Your Reputation
ELECTRICAL SPECIFICATION
Output Logic
Parameter
Supply Voltage Variation(V
DD
) 5%
Frequency Range
Standard Frequency
Operating Temp. Range
Frequency Stability *
Supply Current
19.44MHz
160MHz
250MHz
Output Level
Output High (Logic “1”)
Output Low (Logic “0”)
Transition Time:Rise/Fall Time
+
Start Time
Tri-State (Input to Pin 2 or Pin 1)
Output Active
Output in High Impedance State
RMS Phase Jitter
(Integrated 12KHz ~ 20MHz)
Storage Temp. Range
2.5
_
_
-55
2
0.5
0.3
125
_
0.5
2.5
_
_
-55
2
0.5
0.3
125
_
0.5
V
pS
o
PECL
Min.
3.3
3.135
19.44
2.5
2.375
3.3
3.465
320
Max.
2.5
2.625
3.3
3.135
19.44
Min.
2.5
LVDS
Max.
3.3
3.465
320
2.5
2.625
Unit
V
MHz
MHz
o
2.375
25, 38.88, 62.5, 77.76, 100, 106.25, 125, 155.52, 156.25,
159.375, 161.1328, 164.355469, 167.3316, 187.5, 212.5, 250, 312.5
Refer to Ordering Information
Refer to Ordering Information
_
_
_
75
100
100
1.475
_
_
_
1.68
1.0
3
_
1.095
_
_
_
_
0.9
_
_
50
50
65
1.6
_
1.0
3
C
ppm
Fo
<
160MHz
Fo
<
250MHz
Fo
320MHz
2.275
mA
V
nSec
mSec
C
Standard frequencies are frequencies which the crystal has been designed and does not imply a stock position.
*
Inclusive of calibration @ 25ºC, operating temperature range, input voltage variation, load variation, aging, shock, and vibration.
+
Transition times are measured between 10% and 90% of V
DD
, with an output load of 15pF.
www.taitien.com
Specifications subject to change without notice.
XO-0054-12 P.2/2
Jan. 1. 2008
45
Crystal Oscillator
FPGA/CPLD
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