EDITION：
SPEC-AF201206
DATE： 2012/06/13
EYANG TECHNOLOGY DEVELOPMENT CO.,LTD
Multi-layer Ceramic Chip Capacitor
SPECIFICATION
(
General Series)
ADD：EYANG Building, 3 Qimin Street, No.2 Langshan Road, North Area,
High-Tech Industrial Park, Nanshan District, Shenzhen, Guangdong, P.R.C Postcode:518057
TEL：86-0755-86252188
FAX：86-0755-86278303
宇阳科技发展有限公司
EYANG TECHNOLOGY DEVELOPMENT CO.,LTD
1. Scope:
The specifications are applicable to the multi-layer ceramic chip capacitor (MLCC) of the Part Number
Contrast List.
Type of Dielectrics: NP0(C0G/C0H)、X7R、X5R、Y5V；
Chip Size: 0402、0603、0805、1206；
Capacitance: 0.5pF~1μF
2. Part Number System:
C 0402 X5R 104 K 160 N T B
Product Codes
Dimensions
（EIA）
0402；0603
0805；1206
Type of
Dielectrics
C0G、X5R
X7R、Y5V
Rated
Capacitance
0R5=0.5pF
101=100pF
104=100000pF
Rated Voltage
6R3=6.3V；100=10V
160=16V ；250=25V
500=50V
stand
for
MLCC
Thickness Code of
Chip
Details are
shown in Table
1.
Thickness code "B"
for 0402, code "D"
for 0603, code "E"
for 0805, can be
ignore.
Packing
Details are shown
in Table 4.
Capacitance Tolerance
A：±0.05pF B：±0.1pF C：
±0.25 Pf
D：±0.5pF F：±1%
G：±2%
J：±5%
K：±10%
L：±15%
M：±20%
Z：+80/-20%
Termination Type
N：Cu/Ni/Sn
structure
L
1
W
L
2
T
L
Fig.1 Configuration and Dimension of MLCC
Table 1 Size of MLCC (Unit: mm)
Size Code
L
1.00±0.05
1.00
+0.15-0
1.10±0.10
1.60±0.10
W
0.50±0.05
0.50
+0.13-0
0.60±0.10
0.80±0.10
0.80
+0.15-0.05
0.80
+0.20-0
2
L
1
、L
2
0.10½0.35
0.10½0.35
0.10½0.35
0.15½0.60
0.15½0.60
0.15½0.60
0.50±0.05
0.50
+0.13-0
0.60±0.10
0.80±0.10
T
Code
B
N
C
D
E
K
0402
0603
1.60
+0.20-0
1.60
+0.20-0
0.80
+0.15-0.05
0.80
+0.20-0
宇阳科技发展有限公司
EYANG TECHNOLOGY DEVELOPMENT CO.,LTD
2.00±0.10
0805
2.00
+0.30-0.10
2.00±0.30
2.00±0.20
3.20±0.20
1206
3.20±0.20
3.20±0.20
1.25±0.10
1.25
+0.30-0.10
1.25±0.30
1.25±0.20
1.60±0.20
1.60±0.20
1.60±0.20
0.20½0.75
0.20½0.75
0.20½0.75
0.20½0.75
0.25½0.75
0.25½0.75
0.25½0.75
0.85±0.10
0.95±0.15
1.25±0.30
0.85±0.15
0.85±0.10
1.15±0.10
1.60±0.20
E
W
H
Y
E
O
L
Table 2 Type of Dielectrics
Type of Dielectrics
NP0(C0G/C0H)
X7R
X5R
Y5V
Operating Temperature Range
-55℃½+125℃
-55℃½+125℃
-55℃½+85℃
-30℃½+85℃
Temperature Coefficient or Characteristic
C0G：0±30ppm/℃
C0H：0±60ppm/℃
±15%
±15%
+22/-82%
Table 3 Rated Voltage and Rated Capacitance
Size
Code
0402
Rate Voltage
/U
R
50V
25V
16V
10V
6.3V
50V
25V
16V
10V
6.3V
100V
50V
25V
16V
10V
6.3V
50V
25V
Rate Capacitance
C0G
0.5pF½1.0nF
470pF½1.0nF
—
—
—
0.5pF½3.3nF
1.8nF½4.7nF
—
—
—
—
1.0nF½10nF
6.8nF½10nF
—
—
—
—
—
X7R
100pF½22nF
22nF½27nF
68nF½100nF
—
—
470pF½100nF
180nF½1.0μF
100nF½1.0μF
—
—
100nF
470pF½820nF
220nF½820nF
1.0μF
—
—
100nF/1.0μF
1.0μF
X5R
27nF½47nF
33nF½100nF
33nF½220nF
100nF½220nF
220nF
470pF½100nF
100nF½220nF
220nF½470nF
1.0μF
—
—
—
—
—
—
—
—
—
Y5V
—
100nF½180nF
100nF½180nF
470nF½820nF
—
100nF½330nF
100nF½820nF
—
—
—
—
100nF½820nF
—
470nF½820nF
—
—
—
—
0603
0805
1206
Style of Packing:
Carrier Tape Packing(See Table 4).
Chip Size
Packing
Disc type
Carrier Tape
QTY (Kpcs)
10
10
Y
6.3″
0402
T
7″
J
13″
Paper tape
50
4
4
0603
T
T
0805
P
R
7″
Plastic belt
2
3
Paper tape Plastic belt
3
2
R
1206
P
Firstly, putting 5 reels into 1 box,
Secondly, putting 12 boxes maximum into 1 carton .
Each carton most outfit 12 boxes
，
the remaining gap
site with the use of lightweight complementary material filled.
3
宇阳科技发展有限公司
EYANG TECHNOLOGY DEVELOPMENT CO.,LTD
The style of packing may be designed according to the customers’ demands.
3.1 Visual Inspection:
3.1.1 Requirement:
no obvious defects on ceramic body and termination.
3.1.2 Test Method:
Microscope 10
×.
3.2 Size:
3.2.1 Requirement:
Configuration and dimension of MLCC are shown in Figure 1 and Table 1.
3.2.2 Test Method:
Gauge, whose accuracy is higher than 0.01 mm.
3.3 Operating Environment:
NP0(C0G/C0H)
、
X7R
X5R
Y5V
温度:
-55℃½+125℃；
相对湿度:
≤95%（25℃）
温度:
-55℃½+85℃；
相对湿度:
≤95%（25℃）
温度:
-30℃½+85℃；
相对湿度:
≤95%（25℃）
大气压:
86 KPa
½106KPa
大气压:
86 KPa
½106KPa
大气压:
86 KPa
½106KPa
3.4 Electrical Parameters and Test Methods:
NO.
1
Item
Capacitance/
(C)
Table 5 Specifications and Test Methods of MLCC Electrical Parameter
Specification
Test Method
Within the specified tolerance in Table1, Table4
NP0(C0G/C0H)：
C≥30pF，tgδ≤10×10
-4
；
C<30pF， tgδ≤1.0×(90/C+7)×10
-4
X7R:
X5R:
-4
U
R
=50V tgδ≤350×10
U
R
=50V/25V tgδ≤750×10
-4
U
R
=25V tgδ≤480×10
-4
U
R
=16V
tgδ≤800×10
-4
U
R
=10V
U
R
≤16V
tgδ≤500×10
-4
tgδ≤900×10
-4
U
R
=6.3V
tgδ≤1000×10
-4
Y5V:
U
R
≥25V
tgδ≤950×10
-4
U
R
=16V tgδ≤1300×10
-4
U
R
≤10V
tgδ≤1600×10
-4
NP0(C0G/C0H):
C≤10nF，Ri≥10000MΩ
C>10nF，Ri×C≥500s
Y5V：
X7R、X5R：
C≤25nF, Ri≥4000MΩ
C≤25nF，Ri≥4000MΩ
C>25nF, Ri×C≥100s
C>25nF，Ri×C≥100s
Temperature:
18½28℃；
Humidity:
≤RH
80%；
Test requency:
NP0(C0G/C0H)、
：
C≤1000pF，f=1MHz±10%；
C>1000pF，f=1KHz±10%；
X7R、 X5R、 Y5V：
C≤100pF， f=1MHz±10%；
C>100pF， f=1KHz±10%
Test Voltage:
C≤100pF 1.0±0.2Vrms；
100pF＜C≤1μF：1.0±0.2Vrms
Temperature:18½28℃；
Humidity:
≤RH
80%；
Apply rated voltage within 60±5S.
NP0(C0G/C0H):
3×U
R
X7R、X5R、Y5V:
2.5×U
R
No breakdown or flashover during test
t=1 min
Charge/discharge
50mA.
current
not
exceeds
2
Tangent of
Loss Angle/
(tgδ)
3
Insulation
Resistances/
(Ri)
Voltage Proof
4
Note: Capacitance test instructions of Class 2 ceramic capacitors
When the capacitor initial capacitance is lower than its tolerance value, the test sample need to be heated for
60 ± 5 minutes at 150
℃
± 10
℃
. Recover it, let sit at room temperature for 24±2 hrs, and then test the
capacitance.
4
宇阳科技发展有限公司
EYANG TECHNOLOGY DEVELOPMENT CO.,LTD
3.5 Environment Test Specifications and Methods:
Without specific note, the “test method” in Table 6 is based on GB/T 21041/21042 IDT IEC60384-21/22 .
Table 6 Environment Test Specifications and Methods
No.
Item
Specification
NP0(C0G/C0H)：
α
c
≤
±30ppm/℃ (125℃);
-72≤
α
c
≤+30ppm/℃
( -55℃);
Test Method
Preliminary Drying for 16~24hrs,Special
preconditioning for 1hr at 150
℃
followed
by 24hrs,The ranges of capacitance
change compared with the temperature
ranges (θ1, 25
℃
,
θ2)
shall be within the
specified ranges.
X5R、Y5V:
θ
1
=-55℃,
θ2=85℃
NP0(C0G/C0H)、X7R：
θ
1
=-55℃,θ
2
=125℃
Special preconditioning for 1hr at 150℃
followed by 24hrs;
Preheat the capacitor at
1
Temperature
Coefficient
of
Capacitance (
α
c
)
or
Temperature
Characteristics
X7R、X5R
：
∆C/C ≤
±15%
Y5V
：
-82%≤∆C/C≤+22%
Visual:
No visible damage and terminations
uncovered shall be less than 25%.
Capacitance Change
:
NP0(C0G/C0H):
∆C/C ≤
±2.5% or ±0.25pF,
whichever is larger;
X7R、 X5R:
∆C/C≤±7.5%;
Y5V:
∆C/C ≤
±20%
tgδ and Ri:
meet the initial specification in Table 5.
2
Resistance to
Soldering Heat
110 to 140℃ for 30-60s. Immerse the
capacitor in an eutectic solder solution
at 260±5℃ for 10±1 seconds. The depth
of immersion is 10mm.
Recover it, let sit at room temperature for
6~24±2hrs, then observe appearance and
measure electrical characteristics.
Immerse the test capacitor into a methanol
solution containing rosin for 3 to 5 seconds,
preheat it at 80 to 140
℃
for 30s to 60s and
immerse it into molten solder of 235±5
℃
for
2±0.2 seconds. The depth of immersion is
10mm.
Solder the capacitor to the test jig (glass epoxy
boards) shown in Fig. a. Apply a force in the
direction shown in Fig. b. Bending 2mm at a
speed of 1mm/sec and hold for 5±1secs, then
measure the capacitance.
3
Solderability
75% min. coverage of both terminal electrodes is
soldered evenly and continuously.
Visual:
No visible damage.
c
b
Ø4.5
40
(Unit：mm)
Bond Strength
4
of
Termination
Fig. a
Capacitance Change
:
NP0(C0G/C0H):
∆C/C ≤
±5% or ±0.5pF, whichever
is larger;
X7R、 X5R:
∆C/C≤±12.5%;
Y5V:
∆C/C ≤
±30%
100
50
20
R230
V：1.0mm/sec
P
Flexure≥1
45
45
Fig. b
Capacitance meter
5
NXP MCU
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