Liteon Semiconductor Corporation
LSP2160
1.5A Low Voltage Low Dropout CMOS Regulator
FEATURES
Low-Dropout
Regulator Supports Input Voltages
Down to 1.4V
Output Voltage Available in 0.9V, 1.0V, 1.2V, 1.5V,
1.8V, 2.5V,2.8V,2.85V,3.0V, 3.3V
Stable with a Ceramic Output Capacitor of
1.0uF or Higher
Low Dropout Voltage:150mV at 1.5A
Low Quiescent Current
Over Temperature Shutdown
Short Circuit Protection
Low Temperature Coefficient
Standard SOT223-3L, TO252-3L, TO252-5L ,
SOP8L-EP Package
GENERAL DESCRIPTION
The LSP2160 is a 1.5A CMOS LDO regulator that
features a low quiescent current, ultra low input, output
and dropout voltages, as well as over temperature
shutdown. It is available in SOT223-3L, TO252-3L,
TO252-5L, SOP8L-EP package. The fixed output
voltage of the LSP2160 is set at the factory and
trimmed to ±2%. The LSP2160 is stable with a ceramic
output capacitor of 1.0uF or higher.
This family of regulators can provide either a
stand-alone power supply solution or act as a post
regulator for switch mode power supplies. They are
particularly well suited for applications requiring low
input and output voltage.
APPLICATIONS
DSP, FPGA, and Microprocessor Power Supplies
1.2V Core Voltage for DSPs
SATA Power Supply
LCD TV/ Monitors
Wireless Devices
Communication Devices
Portable Electronics
Post Regulator for SMPS
PIN CONFIGURATION
1) SOT223-3L (Top View)
2) TO252-3L (Top View)
3) TO252-5L (Top View)
4) SOP8L-EP (Top View)
PIN DESCRIPTION
Pin Number
TO252-3L TO252-
3L
B type
3
1
1
2,TAB
2,TAB
3
Pin Name
VIN
GND
VOUT
EN
PWRGD
ADJ
Pin Function
Input
Ground
Output
Enable pin
Power good
Adjust
Rev1.1
SOT223-3L
B type
3
1
2,TAB
SOT223-
3L
1
2,TAB
3
TO252-5L
ADJ
1
3,TAB
5
2
4
SOP8L-EP
-ADJ
2
1,4,5,8
7
3
5
6
1/13
Liteon Semiconductor Corporation
LSP2160
1.5A Low Voltage Low Dropout CMOS Regulator
Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings
for prolonged time periods may affect device reliability
.
All voltages are with respect to ground.
RECOMMENDED OPERATING CONDITIONS
Parameter
Input Supply Voltage
Operating temperature
Operating Junction Temperature
Rating
1.4 to 5.5
-40 to 85
-40 to 125
Unit
V
°C
°C
(V
IN
= V
OUT
+ 0.5V, C
IN
= 1µF, C
O
= 2.2µF, T
A
= 25
°
C unless otherwise specified.)
PARAMETER
Input Voltage
Output Voltage Accuracy
Short Circuit Current
Ground Current
Quiescent Current
Line Regulation
Load Regulation Error
ADJ Input Bias Current
ADJ Reference Voltage
Enable pin voltage(enable)
Enable pin voltage(disable)
Temperature Coefficient
Over Temperature Shutdown
Over Temperature Hystersis
Power Supply Ripple Rejection
SYMBOL
V
IN
V
O
I
SC
I
GND
I
Q
LNR
LDR
I
ADJ
V
REF
VIH
VIL
ELECTRICAL CHARACTERISTICS
TEST CONDITIONS
I
O
= 100mA
V
O
<
0.3V
I
O
= 1mA to 1.5A
I
O
= 0mA
I
O
= 10mA, V
O
≤
2.5V
V
IN
=V
O
+ 0.5V to V
O
+ 1.5V
I
O
= 10mA, V
O
＞2.5V
V
IN
= 3.3V to 5.5V
I
O
= 1mA to 1.5A
V
IN
= 5V , Vout= 1.242V
MIN
Note1
-2
TYP
MAX
5.5
+2
UNIT
V
%
A
µA
µA
%/V
1.0
90
0.5
0.5
0.5
1
0.9
600
150
1
1
2
0.918
0.5
40
150
50
55
55
35
330
220
50
40
330
220
150
120
40
%/A
µA
V
V
V
ppm/°C
°C
°C
dB
0.882
1.1
T
C
OTS
OTH
PSRR
I
O
= 100mA
V
o
=1.5V
f=100Hz
f= 1KHz
f= 10KHz
V
O
= 0.9V
V
O
= 1.0V
1.2V
≤
V
O
<
2.5V
V
O
≥
2.5V
V
O
= 0.9V
I
O
= 1.5A
V
O
= 1.0V
1.2V
≤
V
O
<
2.5V
V
O
≥
2.5V
I
O
= 500mA
Dropout Voltage
V
DROP
500
400
200
150
500
400
350
300
µV
RMS
mV
Output Noise
V
n
f = 10Hz to 100kHz
Note 1：The minimum input voltage of the LSP2160 is determined by output voltage and dropout voltage. The
minimum input voltage is defined as:
V
IN(MIN)
=V
O
+V
DROP
3/13
Rev1.1
Liteon Semiconductor Corporation
LSP2160
1.5A Low Voltage Low Dropout CMOS Regulator
APPLICATION INFORMATION
The LSP2160 family of low-dropout (LDO) regulators have several features that allow them to apply to a wide range
of applications. The family operates with very low input voltage (1.4V) and low dropout voltage (typically 150mV at
full load), making it an efficient stand-alone power supply or post regulator for battery or switch mode power supplies.
The 1.5A output current make the LSP2160 family suitable for powering many microprocessors and FPGA supplies.
The LSP2160 family also has low output noise (typically 40µVRMS with 2.2µF output capacitor), making it ideal for
use in telecom equipment.
External Capacitor Requirements
A 2.2µF or larger ceramic input bypass capacitor, connected between VIN and GND and located close to the
LSP2160, is required for stability. A 1.0uF minimum value capacitor from VO to GND is also required. To improve
transient response, noise rejection, and ripple rejection, an additional 10µF or larger, low ESR capacitor is
recommended at the output. A higher-value, low ESR output capacitor may be necessary if large, fast-rise-time load
transients are anticipated and the device is located several inches from the power source, especially if the minimum
input voltage of 1.4 V is used.
Regulator Protection
The LSP2160 features internal current limiting, thermal protection and short circuit protection. During normal
operation, the LSP2160 limits output current to about 3A. When current limiting engages, the output voltage scales
back linearly until the over current condition ends. While current limiting is designed to prevent gross device failure,
care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device
exceeds 150°C, thermal-protection circuitry will shut down. Once the device has cooled down to approximately 50°C
below the high temp trip point, regulator operation resumes. The short circuit current of the LSP2160 is about 1A
when its output pin is shorted to ground.
Thermal Information
The amount of heat that an LDO linear regulator generates is:
P
D
=(V
IN
-V
O
)I
O
.
All integrated circuits have a maximum allowable junction temperature (T
J
max) above which normal operation is not
assured. A system designer must design the operating environment so that the operating junction temperature (T
J
)
does not exceed the maximum junction temperature (T
J
max). The two main environmental variables that a designer
can use to improve thermal performance are air flow and external heatsinks. The purpose of this information is to aid
the designer in determining the proper operating environment for a linear regulator that is operating at a specific
power level.
In general, the maximum expected power (P
D(max)
) consumed by a linear regulator is computed as:
Where:
V
I (avg)
is the average input voltage.
V
O(avg)
is the average output voltage.
I
O(avg)
is the average output current.
I
(Q
) is the quiescent current.
For most LDO regulators, the quiescent current is insignificant compared to the average output current; therefore,
the term V
I(avg)
xI
(Q)
can be neglected. The operating junction temperature is computed by adding the ambient
temperature (T
A
) and the increase in temperature due to the regulator's power dissipation. The temperature rise is
computed by multiplying the maximum expected power dissipation by the sum of the thermal resistances between
the junction and the case (R
θJC
), the case to heatsink (R
θCS
), and the heatsink to ambient (R
θSA
). Thermal
resistances are measures of how effectively an object dissipates heat. Typically, the larger the device, the more
surface area available for power dissipation so that the object's thermal resistance will be lower.
ADJ VERSION
The adjustable version uses external feedback resistors to generate an output voltage anywhere from 1.5V to 5.0V.
Vadj is trimmed to 0.9V and VOUT is given by the equation:
VOUT = VREF ( 1 + R1 / R2 )
Feedback resistors R1 and R2 should be high enough to keep quiescent current low, but increasing R1 + R2 will
reduce stability. In general, R1=100k will produce adequate stability, given reasonable layout precautions. To
improve stability characteristics, keep parasitics on the ADJ pin to a minimum, and lower R1 and R2 values.
4/13
Rev1.1
FPGA/CPLD
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