UESD54B/55B/56B/57B/64B
Quad/Five/Six Line ESD Protection Diode Array
UESD54B
SC70-5/SC88A/SOT353
UESD55B
SC89-6/SOT563/SOT666
UESD56B
SC89-6/SOT563/SOT666
UESD57B
DFN1616-6L
UESD64B
SC89-5/SOT553/SOT665
General Description
The UESD54B/55B/56B/57B/64B of TVS diode array is designed to protect sensitive electronics
from damage or latch-up due to ESD for use in applications where board space is at a premium. It is
unidirectional device and may be used on lines where the signal polarities are above ground. The
UESD54B/55B/64B will protect up to four lines, the UESD56B will protect up to five lines and the
UESD57B will protect up to six lines.
TVS diodes are solid-state devices feature large cross-sectional area junctions for conducting high
transient currents, specifically for transient suppression. It offers desirable characteristics for board
level protection including fast response time, low operating, low clamping voltage, and no device
degradation.
The UESD54B/55B/56B/57B/64B may be used to meet the immunity requirements of IEC 61000-4-2,
level 4. The small package makes them ideal for use in portable electronics such as cell phones,
PDA’s, notebook computers, and digital cameras.
Applications
Cellular Handsets & Accessories
Cordless Phones
Personal Digital Assistants (PDA’s)
Notebooks & Handhelds
Portable Instrumentation
Digital Cameras
Peripherals
MP3 Players
Features
Transient protection for data & power lines to
IEC 61000-4-2 (ESD) ±15kV (air), ±8kV
(contact)
Working Voltages: 5V
Low Leakage current
Low clamping voltage
Solid-state silicon avalanche technology
Ordering Information
Part
Number
UESD54B
UESD55B
UESD56B
UESD57B
UESD64B
Working
Voltage
5.0V
5.0V
5.0V
5.0V
5.0V
Packaging Type
SC70-5/SC88A/SOT353
SC89-6/SOT563/SOT666
SC89-6/SOT563/SOT666
DFN1616-6L
SC89-5/SOT553/SOT665
Channel
4
4
5
6
4
Marking
Code
UQ5
UF5
UB5
E57
UR6
Shipping
Qty
3000pcs/
7 Inch Reel
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UESD54B/55B/56B/57B/64B
Pin Configurations
1
2
3
5
1
2
6
5
4
1
2
3
6
5
4
1
2
3
5
4
3
4
UESD54B
SC70-5/SC88A/SOT353
UESD55B
SC89-6/SOT563/SOT666
UESD56B
SC89-6/SOT563/SOT666
UESD57B
DFN1616-6L
UESD64B
SC89-5/SOT553/SOT665
Top View
M: Month Code
UESD54B
SC70-5/SC88A/SOT353
M: Month Code
UESD55B
SC89-6/SOT563/SOT666
M: Month Code
UESD56B
SC89-6/SOT563/SOT666
WW: Week Code
UESD57B
DFN1616-6L
M: Month Code
UESD64B
SC89-5/SOT553/SOT665
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UESD54B/55B/56B/57B/64B
Absolute Maximum Ratings
Rating
Peak Pulse Power (tp = 8/20μs)
Peak Pulse Current
(tp = 8/20μs)
Lead Soldering Temperature
Operating Temperature
Storage Temperature
Symbol
P
PK
I
PP
T
L
T
J
T
STG
Value
140
11
260(10 sec.)
-55 to +125
-55 to +125
Units
Watts
A
°C
°C
°C
Electrical Characteristics
Parameter
Reverse Stand-Off
Voltage
Reverse Breakdown
Voltage
Reverse Leakage Current
Clamping Voltage
Junction Capacitance
Junction Capacitance
Symbol
V
RWM
V
BR
I
R
V
C
C
J
C
J
It = 1mA
V
RWM
= 5V, T=25°C
I
PP
=5A, t
p
= 8/20μS
I
PP
=11A, t
p
= 8/20μS
Between I/O pins and
GND
V
R
= 0V, f = 1MHz
Between I/O pins and
GND
V
R
= 2.5V, f = 1MHz
40
30
6
6.8
Conditions
Min
Typ
Max
5
7.2
0.1
9.1
13
50
40
Unit
V
V
μA
V
pF
pF
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UESD54B/55B/56B/57B/64B
Typical Operating Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
1
Clamping Voltage vs. Peak Pulse Current
13
12
Peak Pulse Power - Ppk(kW)
Clamping Voltage - Vc(V)
11
10
0.1
9
8
7
0.02
0.04
Waveform
parameters:
tr=8uS
td=20uS
0
2
4
6
8
10
0.1
1
10
100
1000
6
Pulse Duration - tp(uS)
Peak Pulse Current - Ipp(A)
Forward Voltage vs. Forward Current
6
Junction Capacitance vs. Reverse Voltage
50
Forward Voltage - Vf(V)
5
Junction Capacitance(pF)
45
4
40
3
2
Waveform
parameters:
tr=8uS
td=20uS
2
4
6
8
10
35
30
1
0
1
2
3
4
5
Forward Current - If(A)
Reverse Voltage (V)
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UESD54B/55B/56B/57B/64B
Applications Information
UESD54B/55B/56B/57B/64B ESD protection diode is designed to protect quad/five/six data, I/O, or
power supply line. The device is unidirectional and may be used on lines where the signal polarity is
above ground. The cathode should be placed towards the line that is to be protected.
Circuit Board Layout Recommendations for Suppression of ESD
Good circuit board layout is critical for the suppression of ESD induced transients. The following
guidelines are recommended:
1. Place the TVS near the input terminals or connectors to restrict transient coupling.
2. Minimize the path length between the TVS and the protected line.
3. Minimize all conductive loops including power and ground loops.
4. The ESD transient return path to ground should be kept as short as possible.
5. Never run critical signals near board edges.
6. Use ground planes whenever possible. For multilayer printed-circuit boards, use ground
vias.
7. Keep parallel signal paths to a minimum.
8. Avoid running protection conductors in parallel with unprotected conductor.
9. Minimize all printed-circuit board conductive loops including power and ground loops.
10. Avoid using shared transient return paths to a common ground point.
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