Electronics Corp.
Multi-Layer Ceramic Capacitor
C-S4-3-00
High Frequency NP0 (C0G) Dielectrics
Features
High Q, low ESR
A monolithic structure ensures high reliability and mechanical strength.
0603 (EIA 0201) Ultra-miniature size
Suitable for high speed SMT placement on PCBs.
Lead-Free Terminations
Ni barrier termination highly resistance to migration.
Lead-free termination is in compliance with the requirement of green plan and ROHS.
S4
Applications
Cellular Phone, Cordless Phone
GPS, VCO, RF Integrated Circuits
Wireless LAN, RF Transceivers
Communication Equipment
Custom Applications
High Frequency C0G (NP0) Dielectric Characteristics
Capacitance Range
Size
Test Voltage
Test Frequency
Capacitance Tolerance
0.2pF ~ 22pF
0603
(0201)
1005
(0402)
1608
(0603)
1.0 ± 0.2Vrms
1.0 ± 0.2MHz
± 0.25pF for cap＜5pF (± 0.1pF available on request)
± 0.50pF for 5pF≦cap＜10pF (± 0.1pF, ± 0.25pF available on request)
± 5% for cap≧10pF (± 1%, ± 2% available on request)
Operating Temperature Range
Temperature Coefficient
Rated Voltage
*Quality Factor
*ESR
-55℃ to +125℃
0 ± 30 ppm/℃ (EIA C0G)
16, 25 & 50 VDC
1,000 min.
ESR≦1200 mOhm for cap<1.0pF
ESR≦700 mOhm for 1.0pF≦cap<5.0pF
( ESR value @ 1GHz for cap<5.0pF;
ESR value @ 500 MHz for cap≧5.0p) ESR≦350 mOhm for 5.0pF≦cap
Insulation Resistance (+25℃, RVDC)
Insulation Resistance (+125℃, RVDC)
10 GΩ min.
1 GΩ min.
*
Measurements are performed on HP4287A with fixture 16196A (for 1608) / 16196B (for 1005) / 16196C (for 0603), 0.5V;
Environment 25℃+/-3℃, 30%~75%RH
Darfon Product Specification
1
Rev.: 3
Electronics Corp.
Multi-Layer Ceramic Capacitor
NP0 – Low ESR/ High Q (Q Series)
CLASS
TYPE
T.C.
SIZE
(EIA)
RV
* 0.20 p
* 0.50 p
* 0.75 p
1.0 p
1.2 p
1.5 p
1.8 p
2.2 p
2.7 p
3.3 p
3.9 p
4.7 p
5.6 p
6.8 p
8.2 p
10 p
12 p
15 p
18 p
22 p
27 p
33 p
39 p
47 p
56 p
68 p
82 p
100 p
120 p
150 p
180 p
220 p
270 p
330 p
Class I
Low ESR/High Q
NP0(C0G)
1005
0402
25V
50V
16V
B
B
D
B
B
D
B
B
D
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
C-S4-3-00
Microwave (F Series)
CLASS
TYPE
T.C.
SIZE
(EIA)
RV
* 0.20 p
* 0.50 p
* 0.75 p
1.0 p
1.2 p
1.5 p
1.8 p
2.2 p
2.7 p
3.3 p
3.9 p
4.7 p
5.6 p
6.8 p
8.2 p
10 p
12 p
15 p
18 p
22 p
27 p
33 p
39 p
47 p
56 p
68 p
82 p
100 p
120 p
150 p
180 p
220 p
270 p
330 p
Class I
Microwave
NP0(COG)
1005
0402
25V
50V
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
1608
0603
25V
50V
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
*0603
0201
25V
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
16V
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
1608
0603
25V
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
50V
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
S4
Note：Thickness might be changed due to technology improvement.
Thickness Code
Code
A
B
D
Thickness (mm)
0.30+/-0.03
0.50+/-0.05
0.80+/-0.10
Taping Amount
Thickness (mm)
Code
A
B
D
Class
0.30 +/- 0.03
0.50 +/- 0.05
0.80 +/- 0.10
Amount per reel
180 mm (7”)
Paper
15K
10K
4K
Embossed
X
X
X
250mm (10”)
Paper
X
X
10K
Embossed
X
X
X
330mm (13”)
Paper
X
50K
15K
Embossed
X
X
X
Darfon Product Specification
2
Rev.: 3
Electronics Corp.
Multi-Layer Ceramic Capacitor
High Frequency NP0 (C0G) Specifications
No.
Item
Specification
1 Operating Temperature Range
-55℃ to 125℃
2
Rated Voltage
16VDC, 25VDC and 50VDC
Test Method
-
The rated voltage is defined as the maximum
voltage, which may be applied continuously to the
capacitor.
Visual inspection
Using calipers
No failure shall be observed when 250% of the
rated voltage is applied between the terminations
for 1 to 5 seconds, the charge and discharge
current is less than 50mA.
The insulation resistance shall be measured with a
DC voltage not exceeding the rated voltage at 25℃
and 75%RH max, and within 1 minute of charging.
The capacitance/D.F. shall be measured at 25℃ at
the frequency and voltage shown in the tables.
Frequency 1.0±0.2MHz
Voltage 1.0±0.2Vrms
Temperature compensating type: The capacitance
value at 25℃ and 85℃ shall be measured and
calculated from the formula given below.
6
T.C.=(C
85
-C
25
)/C
25
*ΔT*10 (PPM/℃)
Apply a parallel force of 5N to a PCB mounted
sample for 10±1sec. *2N for 0603 (EIA 0201).
Solder the capacitor to the test jig (glass epoxy
boards) shown in Fig. a. using a eutectic solder.
Then apply a force in the direction shown in Fig. b.
The soldering shall be done with the reflow method
and shall be conducted with care so that the
soldering is uniform and free of defects such as
heat shock.
20 50 Pressurizing speed : 1.0mm/sec.
Size
c
a
100
t :1.6mm(0.8mm for 0603&1005 size)
40
0603
1005
1608
2012
3216
a
0.3
0.4
1.0
1.2
2.2
b
0.9
1.5
3.0
4.0
5.0
C
0.3
0.5
1.2
1.65
2.0
Capacitance Meter
C-S4-3-00
3
4
5
Appearance
Dimensions
Dielectric Strength (Flash)
No defects or abnormalities.
Within the specified dimension.
No defects or abnormalities.
6
Insulation Resistance ( I.R.)
I.R.≧10GΩ
S4
7
8
Capacitance
Quality Factor ( Q )
Within the specified tolerance.
1,000 min.
9
Capacitance Temperature
Characteristics
Capacitance change within 0±30ppm/℃
under operating temperature range.
10 Termination Strength
No removal of the terminations or marking
defect.
11 Deflection (Bending Strength)
Appearance: No cracking or marking
defects.
Capacitance change: within ±2.5% or
± 0.25pF. (whichever is larger)
(Unit in mm)
b
φ
4.5
R230
Pressurize
Flexure : 1mm
45
45
Fig. a.
Fig. b.
12 Solderability of Termination
13 Resistance to Appearance
Soldering Heat Cap. Change
Q
I.R.
Immerse the test capacitor into a methanol solution
containing rosin for 3 to 5 seconds, preheat it 150
to 180℃ for 2 to 3 minutes and immerse it into
molten solder of 230 ± 5℃ for 5±1seconds.
No marking defects
Preheat the capacitor at 120 to 150℃ for 1 minute.
NP0 within ±2.5% or ±0.25pF. (whichever is Immerse the capacitor in an eutectic solder solution
at 270±5℃ for 10±1 seconds. Let sit at room
larger)
temperature for 24±2 hours, then measure.
Initial Spec.
Initial Spec.
90% of the terminations are to be soldered
evenly and continuously.
Darfon Product Specification
3
Rev.: 3
Electronics Corp.
Multi-Layer Ceramic Capacitor
Continued from previous page.
14 Temperature
Cycle
(Thermal
Shock)
Appearance
Cap. Change
Q
I.R.
No marking defects
Solder the capacitor to supporting jig (glass epoxy
board) and perform the five cycles according to the
NP0 within ±2.5% or ±0.25pF. (whichever is four heat treatments listed in the following table. Let
larger)
sit for 24±2hrs at room temperature, then measure.
Initial Spec.
Initial Spec.
Step 1: Minimum operating temperature 30±3min
Step 2: Room temperature
2~3 min
Step 3: Maximum operating temperature 30±3min
Step 4: Room temperature
2~3min
Apply the rated voltage at 40±2℃ and 90 to 95%
humidity for 500±12 hours. Remove and let sit for
24±2 hours at room temperature, then measure.
The charge/discharge current is less than 50mA.
C-S4-3-00
15 Humidity Load Appearance
Cap. Change
Q
I.R.
18 High
Temperature
Load
(Life Test)
Appearance
Cap. Change
Q
I.R.
No marking defects
NP0 within ±5.0% or ±0.5pF. (whichever is
larger)
200 min.
I.R.≧500MΩ
No marking defects
NP0 within ±5.0% or ±0.5pF (whichever is
large)
350 min.
I.R.≧1GΩ
Apply 200% of the rated voltage for 500±12 hours
at the maximum operating temperature ± 3℃. Let
sit for 24± 2 hours at room temperature, then
measure. The charge/discharge current is less than
50mA.
S4
Darfon Product Specification
4
Rev.: 3
Electronics Corp.
Multi-Layer Ceramic Capacitor
Typical RF Characteristics for High Frequency NP0 (C0G) 0603 (EIA 0201) at 1GHz.
C-S4-3-00
Maximun ESR @ 1GHz
0603 size
1000
900
800
700
ESR (mΩ)
600
500
400
300
200
100
0
0.5
1
1.5
2
2.4
3
3.6
4.7
5.6
6.8
8.2
10
S4
Capacitance (pF)
Minimun Q Factor @ 1GHz
400
350
300
250
200
150
100
50
0
0.5
1
1.5
2
2.4
3
3.6
4.7
5.6
6.8
8.2
10
Capacitance (pF)
Measurements performed on a HP4287A with fixture 16196B and represent the typical capacitor performance.
0603 size
Darfon Product Specification
Q
5
Rev.: 3
FPGA/CPLD
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