The XX1188 power-management IC (PMIC) is an complete,
efficient, compact devices suitable for 3G cellular
applications such as wireless data cards, handsets and
PDAs,. It integrates a 2MHz synchronous buck regulator,
nine low-dropout linear regulators (LDOs), a RESET
generator, and an 32KHZ crystal driver and buffer.
XX1188 is housed in a thin QFN4x4-28pin package.
10-Channel Power Management
Units for 3G Applications
FEATURES
Buck converter for MSMC,1.2V/500mA
LDO1 for MSME, 1.8V/300mA
LDO2 for MSMP, 2.6V/300mA
LDO3 for MEMA, 2.6V/300mA
LDO4 for TCXO, 2.85V/50mA
LDO5 for RFTX, 2.1V/300mA
LDO6 for RFRX, 2.7V/150mA
LDO7 for USB, 3.3V/50mA
LDO8 for URIM, 3.0v/1.8v, 50mA
LDO9 for MMC, 3.0V/150mA
Independent ON/OFF control for LDO4,5,6,7,8,9
RESET generator
Inverter for 32Mhz crystal oscillator
QFN4x4-28L package
APPLICATIONS
3G wireless Cards
3G phones
PIN CONFIGURATION
TYPICAL APPLICATION
PWR_ON
IN2
OUT1
LDO1
nRESET
IN1
IN2
+
-
UVLO &
Thermal
shutdown
+
LDO3
OUT3
-
OUT2
LDO2
+
-
REF
+
LDO4
OUT4
-
RESET
EN4
OUT5
LDO5
+
-
+
LDO9
LDO9
-
EN56
+
LDO6
EN9
+
LDO7
OUT6
OUT7
-
-
EN8
+
LDO8
EN7
LX
Crystal
Interver
600mA
DC-DC
OUT8
-
FB
XTALO
XTALI
CLK_OUT
REF
Page 1
V1.1
XX1188
ABSOLUTE MAXIMUM RATINGS
10-Channel Power Management Units for 3G Applications
(Note: Exceeding these limits may damage the device. Exposure to absolute maximum rating conditions for long periods may affect device reliability.)
IN1,IN2, IN3 Voltage ............................................................................................................................... .......... –0.3V to 6V
EN_, REF, SEL Voltage ........................................................................................................................... .......... –0.3V to 6V
LX, LDO7 Voltage ……………………………………………..……………………………………………….... –0.3V to IN1+0.3V
LDO1,2,5,6,8 Voltage ………………………………………………………………………………..……… ..... –0.3V to IN1+0.3V
LDO3,4,9 Voltage…………………………………………………………….…………………………………. . –0.3V to IN1+0.3V
XTALI, XTALO, CLKOUT Voltage ……………………....…………………………………………………. . –0.3V to LDO2+0.3V
LX to ground current ……………………………………………………..………...…...………………….…… Internally limited
Maximum Power Dissipation…………………………………………………………………………………………….……….1.8W
Operating Temperature Range …………………………………………………………………………………...... –40° C to 85° C
Storage Temperature Range ………………………………………………………………………………..….. –55° C to 150° C
ELECTRICAL CHACRACTERISTICS
SYSTEM CONTROL
(V
IN
= 5V, unless otherwise specified. Typical values are at TA = 25oC.)
PARAMETER
Input Voltage Range
Input UVLO
Input Supply Current
Input Shutdown Current
REFERENCE Voltage
nRESET Delay
Logic Input High Voltage
(PWR_ON, EN_)
Logic Input Low Voltage
(PWR_ON, EN_)
Thermal Shutdown
Thermal Shutdown Hysteresis
CONDITIONS
Rising, Hysteresis=100mV
V
FB
=0.7V, All LDO ON
V
OUT
=2.5 to 5V
MIN
3
TYP
2.9
500
MAX
5.5
1.235
1.40
1.25
60
1
1.265
UNITS
V
V
A
A
V
mS
V
V
o
C
o
C
0.4
160
15
600mA DC-DC STEP-DOWN CONVERTER
(V
IN
= 5V, unless otherwise specified. Typical values are at TA = 25oC.)
PARAMETER
Input Voltage Range
Input UVLO
Input Supply Current
Input Shutdown Current
FB Feedback Voltage
FB Input Current
Output Voltage Range
Load Regulation
Line Regulation
Minimum ON/OFF time
NMOS Switch On Resistance
PMOS Switch On Resistance
CONDITIONS
Rising, Hysteresis=100mV
V
FB
=0.7V
V
OUT
=2.5 to 5V
MIN
2.6
TYP
2.5
40
MAX
5.5
1
0.6
10
0.6
V
IN
=2.7 to 5.5V
I
SW
=500mA
I
SW
=500mA
0.001
0.04
100
0.3
0.3
5
UNITS
V
V
A
A
V
nA
V
%/mA
%/V
ns
Page 2
V1.1
XX1188
PARAMETER
PMOS Switch Current Limit
NMOS Switch Current Limit
SW Leakage Current
CONDITIONS
10-Channel Power Management Units for 3G Applications
CP8900
UNITS
A
A
A
MIN
TYP
1
0.9
MAX
V
OUT
= 5.5V, V
SW
= 0 or 5.5V,
EN= V
IN
10
LOW DROPOUT LINEAR REGULATORS
(V
IN
= 5V, unless otherwise specified. Typical values are at TA = 25oC.)
PARAMETER
Input Voltage Range
Input UVLO
Input Supply Current
Input Shutdown Current
Maximum Output current
CONDITIONS
Rising, Hysteresis=100mV
MIN
2.6
TYP
2.5
60
MAX
5.5
1
LDO4,7,8
LDO6,9
LDO1,2,3,5
LDO4,7,8, IOUT=50mA
LDO6,9, IOUT=75mA
LDO1,2,3,5, IOUT=100mA
V
IN
=2.7 to 5.5V
50
150
300
100
100
100
0.02
0.04
150
150
150
UNITS
V
V
A
A
mA
Dropout Voltage
mV
Load Regulation
Line Regulation
%
%/V
CRYSTAL OSCILLATOR DRIVER
(V
IN
= 5V, unless otherwise specified. Typical values are at TA = 25oC.)
PARAMETER
Output High Voltage Level
Output Ligh Voltage Level
Duty cycle
CONDITIONS
I(CLK_OUT)=2mA
MIN
OUT2-0.4
TYP
MAX
0.4
50
UNITS
V
V
%
PIN DESCRIPTION
PIN #
1
2
3
4
5
6
7
8
9
10
11
NAME
LDO4
LDO3
IN3
LDO5
LDO6
LDO2
LDO1
LDO8
IN2
EN56
SEL
DESCRIPTION
LDO4 Output. Delivers up to 150mA.Connect a 2.2μF ceramic capacitor from OUT4 to GND.
LDO3 Output. Delivers up to 150mA.Connect a 2.2μF ceramic capacitor from OUT3 to GND.
Power input for LDO3,4,9. Can be connected to IN3 or output of the BUCK.
LDO 5 Output. Delivers up to 150mA.Connect a 2.2μF ceramic capacitor from OUT5 to GND.
LDO 6 Output. Delivers up to 150mA.Connect a 2.2μF ceramic capacitor from OUT6 to GND.
LDO 2 Output. Delivers up to 150mA.Connect a 2.2μF ceramic capacitor from OUT2 to GND.
LDO1 Output. Delivers up to 150mA.Connect a 2.2μF ceramic capacitor from OUT1 to GND.
LDO8 Output. Delivers up to 150mA.Connect a 2.2μF ceramic capacitor from OUT8 to GND.
Power input for LDO1,2,5,6,8. Can be connected to IN1 or output of the BUCK.
Enable Input for Linear Regulator 5 and 6. Drive high to enable.
Voltage select pin for LDO8.
Page 3
V1.1
XX1188
PIN #
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
NAME
EN4
XTALI
XTALO
CLKOUT
FB
PGND
LX
IN1
EN7
EN9
PWR_ON
REF
LDO7
GND
LDO9
EN8
nRESET
DESCRIPTION
10-Channel Power Management Units for 3G Applications
Enable Input for Linear Regulator 4. Drive high to enable.
Crystal input pin. Tiethe crystal between this pin and XTALO and a 22pF capacitor to GND.
Crystal output pin. Tie the crystal between this pin and XTALI and a 22pF capacitor to GND.
Clock output. Buffered output of the crystal oscillator.
Feedback pin for BUCK. Connect to midpoint of the resistor ladder to set BUCK output
voltage.
Power Ground. Connect to GND
Inductor connection for BUCK. Connect an inductor between this pin to OUT of BUCK.
Power input for BUCK, LDO7 and system control circuit.
Enable Input for Linear Regulator 7. Drive high to enable.
Enable Input for Linear Regulator 9. Drive high to enable.
Power on pin. Pull this pin high to turn on the IC.
Low noise 1.25V reference. Bypass this pin with a 10nF cap to GND.
LDO7 Output. Delivers up to 50mA. Connect a 2.2μF ceramic capacitor from OUT7 to GND.
Ground
LDO9 Output. Delivers up to 150mA.Connect a 2.2μF ceramic capacitor from OUT9 to GND.
Enable Input for Linear Regulator 8. Drive high to enable.
Reset output, 65ms. Active low.. nRESET is low in shutdown.
FUNCTIONAL DESCRIPTION
The XX1188 power-management IC (PMIC) is an
complete, efficient, compact devices suitable for 3G
cellular applications such as wireless data cards,
handsets and PDAs,. It integrates a 2MHz synchronous
buck regulator, nine low-dropout linear regulators (LDOs),
a RESET generator, and an 32KHZ crystal driver and
buffer.
and for OUT4, OUT7and OUT8 they are 50mA. OUT1,
OUT2, OUT3 are enabled after the DC-DC reaches
regulation. The rest of the LDOs have enable control pins.
Output of LDO8 can also be either 3.3V or 1.8V, depends
on the voltage at SEL pin.
Crystal Driver
The XX1188 also provides a 32Khz crystal driver and a
clock buffer that can be used for the system real time
clock.
DC-DC Step-Down Converter
The XX1188 consists of a 2Mhz DC-DC step-down
converter that is capable of delivering 600mA output
current. It uses a hysteretic control scheme that provides
fast switching, low output ripple, high efficiency, and fast
transient response with simple setup of external
components. The internal synchronous rectifier eliminates
the use of external Schottky.
Reset
The XX1188 integrates a 60ms power-on reset generator,
reducing system size and cost. nRESET is an open-drain
output; connect a 10kΩ or greater pull-up resistor from
nRESET to an appropriate voltage supply. nRESET
asserts low upon startup and remains low until the 60ms
reset timeout period expires, at which point nRESET goes
high-Z.
Linear Regulators
The XX1188 contains nine low-dropout, low quiescent
current, low-operating voltage linear regulators. The
maximum output currents for OUT1, OUT2, OUT3, and
OUT5 are 300mA, for OUT6 and OUT6, they are 150mA,
Page 4
V1.1
XX1188
BLOCK DIAGRAM
PWR_ON
IN2
OUT1
LDO1
10-Channel Power Management Units for 3G Applications
CP8900
nRESET
IN1
IN2
+
-
UVLO &
Thermal
shutdown
+
LDO3
OUT3
-
OUT2
LDO2
+
-
REF
+
LDO4
OUT4
-
RESET
EN4
OUT5
LDO5
+
-
+
LDO9
LDO9
-
EN56
+
LDO6
EN9
+
LDO7
OUT6
OUT7
-
-
EN8
+
LDO8
EN7
LX
Crystal
Interver
600mA
DC-DC
OUT8
-
FB
XTALO
XTALI
CLK_OUT
REF
TIMING DIAGRAM
*
The delay between LDO1 start up after Buck power up is to set min. delay time 250us, typical 350us, max. 500us at
25C. This is to guarantee enough delay time for full temperature range, as delay time is about 250us at 85C.
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