UTRON
Rev. 1.3
UT62L25716
256K X 16 BIT LOW POWER CMOS SRAM
REVISION HISTORY
REVISION
DESCRIPTION
Preliminary Rev. 0.5
Original.
Rev.1.0
1.Separate Industrial and Commercial SPEC.
2.New waveforms.
3.Add access time 55ns range.
4.The symbols CE1# and OE# and WE# are revised as. CE1 and
OE and
WE
.
Rev.1.1
1.Revised access time 55/70/100ns
-Rev 1.0: 55ns(max) for Vcc=3.0V~3.6V
70/100 ns(max) for Vcc=2.7V~3.6V
2.Revised “SYMBOL” : CE1 CE
3.Revised ABSOLUTE MAXIMUM RATINGS
- V
TERM
: -0.3 to 4.6
-0.5 to 4.6V
- P
D :
1.0~1.5
1W
- I
OUT
: 50 20mA
4.Revised DC CHARACTERISTICS
- V
IH
: 2.0 2.2V
5.Revised AC CHARACTERISTICS
- t
OH
& t
BLZ
: 5 10ns
6.Revised 48-pin TFBGA package outline dimension：
-ball diameter : 0.3mm
0.35mm
Rev.1.2
1. Revised Standby current (LL-Version) : 3uA(typ) 2uA(typ)
2. Revised operating current (Iccmax) : 45/35/25mA 40/30/25mA
3. Revised DC CHARACTERISTICS :
a. Operating Power Supply Current (Icc)
55ns (max) : 45 40mA
70ns (typ) : 25 20mA, 70ns (max) : 35 30mA
100ns (Typ) : 20 16mA
b. Standby current(CMOS) :
LL-version (typ) : 3 2uA, 25 20uA
Rev.1.3
1. Revised V
OH
(Typ) : NA 2.7V
2. Add V
IH
(max)=V
CC
+2.0V for pulse width less than 10ns.
V
IL
(min)=V
SS
-2.0V for pulse width less than 10ns.
3. Add order information for lead free product
Draft Date
Mar, 2001
Jul. 12,2001
Nov. 8. 2002
Dec 03,2002
May 06.2003
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80047
1
UTRON
Rev. 1.3
UT62L25716
256K X 16 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The UT62L25716 is a 4,194,304-bit low power
CMOS static random access memory organized as
262,144 words by 16 bits.
The UT62L25716 operates from a single 2.7V ~
3.6V power supply and all inputs and outputs are
fully TTL compatible.
The UT62L25716 is designed for low power system
applications. It is particularly well suited for use in
high-density low power system applications.
FEATURES
Fast access time : 55/70/100 ns
CMOS low power operating
Operating current : 40/30/25 (Icc max.)
Standby current : 20uA (typ.) L-version
2uA (typ.) LL-version
Single 2.7V~3.6V power supply
Operating temperature:
Commercial : 0
℃
~70
℃
Extended : -20
℃
~80
℃
All TTL compatible inputs and outputs
Fully static operation
Three state outputs
Data retention voltage:1.5V (min.)
Data byte control :
LB
(I/O1~I/O8)
UB (I/O9~I/O16)
Package : 48-pin 6mm × 8mm TFBGA
FUNCTIONAL BLOCK DIAGRAM
256K X 16
MEMORY
ARRAY
A0-A17
DECODER
Vcc
Vss
I/O1-I/O8
Lower Byte
I/O9-I/O16
Upper Byte
I/O DATA
CIRCUIT
COLUMN I/O
CE2
CE
OE
WE
LB
UB
CONTROL
CIRCUIT
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80047
2
UTRON
Rev. 1.3
UT62L25716
256K X 16 BIT LOW POWER CMOS SRAM
PIN DESCRIPTION
A2
CE2
PIN CONFIGURATION
A
LB
OE
A0
A1
B
I/O9
UB
A3
A4
CE
I/O1
SYMBOL
A0 - A17
I/O1 - I/O16
CE , CE2
WE
OE
LB
UB
V
CC
V
SS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Lower-byte Control
Upper-byte Control
Power Supply
Ground
No Connection
C
I/O10
I/O11
A5
A6
I/O2
I/O3
D
Vss
I/O12
A17
A7
I/O4
Vcc
E
Vcc
I/O13
NC
A16
I/O5
Vss
F
I/O15
I/O14
A14
A15
I/O6
I/O7
G
I/O16
NC
A12
A13
WE
I/O8
H
NC
A8
A9
A10
A11
NC
1
2
3
4
5
6
TFBGA
TRUTH TABLE
MODE
CE
CE2
OE
WE
LB
UB
X
X
H
X
L
H
L
L
H
L
L
H
X
X
Standby
X
L
X
X
X
X
L
H
H
Output Disable
L
H
H
L
H
L
Read
L
H
L
L
H
L
X
H
L
Write
X
H
L
X
H
L
Note: H = V
IH
, L=V
IL
, X = Don't care.
X
X
X
H
H
H
H
H
L
L
L
X
X
H
L
X
L
H
L
L
H
L
I/O OPERATION
I/O1-I/O8
I/O9-I/O16
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
D
OUT
High – Z
D
OUT
High – Z
D
OUT
D
OUT
D
IN
High – Z
D
IN
High – Z
D
IN
D
IN
SUPPLY
CURRENT
I
SB
, I
SB1
I
CC
,I
CC1
,I
CC2
I
CC
,I
CC1
,I
CC2
I
CC
,I
CC1
,I
CC2
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80047
3
UTRON
Rev. 1.3
UT62L25716
256K X 16 BIT LOW POWER CMOS SRAM
SYMBOL
V
TERM
T
A
T
A
T
STG
P
D
I
OUT
Tsolder
RATING
-0.5 to 4.6
0 to 70
-20 to 80
-65 to 150
1
50
260
UNIT
V
℃
℃
℃
W
mA
℃
ABSOLUTE MAXIMUM RATINGS*
PARAMETER
Terminal Voltage with Respect to V
SS
Commercial
Operating Temperature
Extended
Storage Temperature
Power Dissipation
DC Output Current
Soldering Temperature (under 10 secs)
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 2.7V~3.6V, T
A
= 0
℃
to 70
℃
/ -20
℃
to 80
℃
(E))
PARAMETER
SYMBOL
TEST CONDITION
Power Voltage
V
CC
＊
1
Input High Voltage
V
IH
＊
2
Input Low Voltage
V
IL
Input Leakage Current
I
LI
V
SS
≦
V
IN
≦
V
CC
Output Leakage Current
I
LO
V
SS
≦
V
I/O
≦
V
CC;
Output Disable
Output High Voltage
V
OH
I
OH
= -1mA
Output Low Voltage
V
OL
I
OL
= 2.1mA
Cycle time=min, 100%duty
Operating Power
I
CC
I/O=0mA, CE =V
IL
Supply Current
Average Operation
Current
Standby Current (TTL)
Standby Current (CMOS)
I
CC1
I
CC2
I
SB
I
SB1
CE =V
IH,
other pins =V
IL
or V
IH
CE =V
CC
-0.2V
other pins at 0.2V or Vcc-0.2V
100%duty,I
I/O
=0mA, CE
≦
0.2V,
other pins at 0.2V or Vcc-0.2V
MIN. TYP. MAX. UNIT
2.7 3.0
3.6
V
2.2
-
V
CC
+0.3
V
-0.2
-
0.6
V
-1
-
1
µA
-1
-
1
µA
2.2 2.7
-
V
-
-
0.4
V
-
30
40
mA
-
20
30
mA
-
16
25
mA
-
-
-
-
-
4
8
0.3
20
2
5
10
0.5
80
20
mA
mA
mA
µA
µA
55
70
100
Tcycle=
1µs
Tcycle=
500ns
-L
-LL
Notes:
1. Overshoot : Vcc+2.0v for pulse width less than 10ns.
2. Undershoot : Vss-2.0v for pulse width less than 10ns.
3. Overshoot and Undershoot are sampled, not 100% tested.
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80047
4
UTRON
Rev. 1.3
UT62L25716
256K X 16 BIT LOW POWER CMOS SRAM
CAPACITANCE
(T
A
=25
℃
, f=1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0V to 3.0V
5ns
1.5V
C
L
= 30pF, I
OH
/I
OL
= -1mA/2.1mA
AC ELECTRICAL CHARACTERISTICS
(V
CC
=2.7V~3.6V, T
A
=0
℃
to 70
℃
/ -20
℃
to 80
℃
(E))
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
LB
,
UB
Access Time
LB
,
UB
to High-Z Output
LB
,
UB
to Low-Z Output
SYMBOL
t
RC
t
AA
t
ACE
t
OE
t
CLZ*
t
OLZ*
t
CHZ*
t
OHZ*
t
OH
t
BA
t
BHZ
t
BLZ
UT62L25716-55
MIN.
MAX.
55
-
-
55
-
55
-
30
10
-
5
-
-
20
-
20
10
-
-
55
-
25
10
-
UT62L25716-70
MIN.
MAX.
70
-
-
70
-
70
-
35
10
-
5
-
-
25
-
25
10
-
-
70
-
30
10
-
UT62L25716-100
UNIT
MIN.
MAX.
100
-
ns
-
100
ns
-
100
ns
-
50
ns
10
-
ns
5
-
ns
-
30
ns
-
30
ns
10
-
ns
-
100
ns
-
40
ns
10
-
ns
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High Z
SYMBOL
t
WC
t
AW
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW*
t
WHZ*
t
BW
LB
,
UB
Valid to End of Write
*These parameters are guaranteed by device characterization, but not production tested.
UT62L25716-55
MIN.
MAX.
55
-
50
-
50
-
0
-
45
-
0
-
25
-
0
-
5
-
-
30
45
-
UT62L25716-70
MIN.
MAX.
70
-
60
-
60
-
0
-
55
-
0
-
30
-
0
-
5
-
-
30
60
-
UT62L25716-100
UNIT
MIN.
MAX.
100
-
ns
80
-
ns
80
-
ns
0
-
ns
70
-
ns
0
-
ns
40
-
ns
0
-
ns
5
-
ns
-
40
ns
80
-
ns
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80047
5
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