LT4410AC/ LT4410AC-G
N-Channel 30-V (D-S) MOSFET
GENERAL DESCRIPTION
The LT4410AC is the N-Channel logic enhancement mode power
field effect transistors are produced using high cell density, DMOS
trench technology. This high density process is especially tailored
to minimize on-state resistance. These devices are particularly
suited for low voltage application such as cellular phone and
notebook computer power management and other battery
powered circuits where high-side switching and low in-line power
loss are needed in a very small outline surface mount package.
FEATURES
●
R
DS(ON)
=12m
@V
GS
=10V (Typ)
●
R
DS(ON)
=17m
@V
GS
=4.5V(Typ)
●
Super high density cell design for extremely low R
DS(ON)
●
Exceptional on-resistance and maximum DC current
capability
APPLICATIONS
●
Power Management in Note book
●
Portable Equipment
●
Battery Powered System
●
DC/DC Converter
●
Load Switch
●
DSC
PIN CONFIGURATION
(SOP-8)
Top View
Ordering Information:
LT4410AC (Pb-free)
LT4410AC-G (Green product-Halogen free)
Absolute Maximum Ratings
(T
A
=25℃ Unless Otherwise Noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
Maximum Power Dissipation
Operating Junction Temperature
Thermal Resistance-Junction to Ambient
*
The *
Symbol
V
DSS
V
GSS
T
A
=25℃
T
A
=70℃
T
A
=25℃
T
A
=70℃
I
D
I
DM
P
D
T
J
R
θJA
Maximum
30
±20
11.6
9.2
46.4
2.08
1.33
-55 to 150
T≦10 sec
Steady State
35
60
Unit
V
V
A
A
W
℃
℃/W
*
The device mounted on 1in
2
FR4 board with 2 oz copper
Rev 2. Nov. 2010
LT4410AC/ LT4410AC-G
N-Channel 30-V (D-S) MOSFET
Electrical Characteristics
(T
A
=25℃ Unless Otherwise Specified)
Symbol
STATIC
V
GS(th)
I
GSS
I
DSS
I
D(ON)
R
DS(ON)
V
SD
DYNAMIC
Qg
Qgt
Qgs
Qgd
Ciss
Coss
Crss
Rg
t
d(on)
tr
t
d(off)
t
f
Total Gate Charge
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-On Fall Time
V
GS
=0V, V
DS
=0V, f =1MHz
V
DD
=25V, R
L
=25Ω
I
D
=1A, V
GEN
=10V
R
G
=6Ω
V
DS
=15V, V
GS
=0V, f=1MHz
V
DS
=15V, V
GS
=10V, I
D
=10A
V
DS
=15V, V
GS
=4.5V, I
D
=10A
11
20
5
4.9
700
120
35
0.9
14
12
43
4
17
15
55
6
ns
Ω
800
pF
15
26
nC
Gate Threshold Voltage
Gate Leakage Current
Zero Gate Voltage Drain Current
On-State Drain Current
a
Parameter
Limit
V
DS
=V
GS
, I
D
=250μA
V
DS
=0V, V
GS
=±20V
V
DS
=30V, V
GS
=0V
V
DS
=30V, V
GS
=0V (T
J
=55℃)
V
DS
=5V,
V
GS
=
10V
a
Min Typ
1.0
1.4
Max
3.0
±100
1
Unit
V
nA
μA
5
20
12
17
0.7
18
20
1.1
V
A
mΩ
Drain-Source On-State Resistance
Diode Forward Voltage
V
GS
=10V, I
D
= 10A
V
GS
=4.5V, I
D
= 8A
I
S
=2.3A, V
GS
=0V
Notes: a. Pulse test; pulse width
≦
300us, duty cycle≦ 2%
Rev 2. Nov. 2010
LT4410AC/ LT4410AC-G
N-Channel 30-V (D-S) MOSFET
SOP-8 Package Outline
NOTES:
1. PKG ALL SURFACES ARE Ra0.8-1.2um.
2. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm in total (both sides).
Rev 2. Nov. 2010
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