EN29LV400
EN29LV400
4 Megabit (512K x 8-bit / 256K x 16-bit) Flash Memory
Boot Sector Flash Memory, CMOS 3.0 Volt-only
FEATURES
•
3V, single power supply operation
- Full voltage range: 2.7-3.6 volt read and write
operations for battery-powered applications.
- Regulated voltage range: 3.0-3.6 volt read
and write operations and for compatibility with
high performance 3.3 volt microprocessors.
•
High performance
- Access times as fast as 45 ns
•
Low power consumption (typical values at 5
MHz)
- 7 mA typical active read current
- 15 mA typical program/erase current
- 1
µA
typical standby current (standard access
time to active mode)
•
Flexible Sector Architecture:
- One 16 Kbyte, two 8 Kbyte, one 32 Kbyte,
and seven 64 Kbyte sectors (byte mode)
- One 8 Kword, two 4 Kword, one 16 Kword
and seven 32 Kword sectors (word mode)
- Supports full chip erase
- Individual sector erase supported
- Sector protection:
Hardware locking of sectors to prevent
program or erase operations within individual
sectors
Additionally, temporary Sector Group
Unprotect allows code changes in previously
locked sectors.
•
High performance program/erase speed
- Byte/Word program time: 8µs typical
- Sector erase time: 500ms typical
•
JEDEC Standard program and erase
commands
•
JEDEC standard
DATA
polling and toggle
bits feature
•
Single Sector and Chip Erase
•
Sector Unprotect Mode
•
Embedded Erase and Program Algorithms
•
Erase Suspend / Resume modes:
Read or program another Sector during
Erase Suspend Mode
•
triple-metal double-poly triple-well CMOS
Flash Technology
•
Low Vcc write inhibit < 2.5V
•
>100K program/erase endurance cycle
da0.
•
Package Options
- 48-pin TSOP (Type 1)
- 48-ball 6mm x 8mm FBGA
•
Commercial and Industrial Temperature
Range
GENERAL DESCRIPTION
The EN29LV400 is a 4-Megabit, electrically erasable, read/write non-volatile flash memory,
organized as 524,288 bytes or 256,144 words. Any byte can be programmed typically in 8µs. The
EN29LV400 features 3.0V voltage read and write operation, with access times as fast as 45ns to
eliminate the need for WAIT states in high-performance microprocessor systems.
The EN29LV400 has separate Output Enable (
OE
), Chip Enable (
CE
), and Write Enable (WE)
controls, which eliminate bus contention issues. This device is designed to allow either single
Sector or full chip erase operation, where each Sector can be individually protected against
program/erase operations or temporarily unprotected to erase or program. The device can sustain a
minimum of 100K program/erase cycles on each Sector.
This Data Sheet may be revised by subsequent versions
1
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. C, Issue Date: 2004/03/18
EN29LV400
CONNECTION DIAGRAMS
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE#
RESET#
NC
NC
RY/BY#
NC
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
BYTE#
Vss
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
Vcc
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
Vss
CE#
A0
Standard
TSOP
FBGA
Top View, Balls Facing Down
A6
B6
C6
D6
E6
F6
G6
H6
A13
A12
A14
A15
A16
BYTE#
DQ15/A-1
Vss
A5
B5
C5
D5
E5
F5
G5
H5
A9
A8
A10
A11
DQ7
DQ14
DQ13
DQ6
A4
B4
C4
D4
E4
F4
G4
H4
WE#
RESET#
NC
NC
DQ5
DQ12
Vcc
DQ4
A3
B3
C3
D3
E3
F3
G3
H3
RY/BY#
A2
NC
B2
NC
C2
NC
D2
DQ2
E2
DQ10
F2
DQ11
G2
DQ3
H2
A7
A1
A17
B1
A6
C1
A5
D1
DQ0
E1
DQ8
F1
DQ9
G1
DQ1
H1
A3
A4
A2
A1
A0
CE#
OE#
Vss
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
2
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. C, Issue Date: 2004/03/18
EN29LV400
TABLE 1. PIN DESCRIPTION
Pin Name
A0-A17
DQ0-DQ14
DQ15 / A-1
CE#
OE#
RESET#
RY/BY#
WE#
Vcc
Vss
NC
BYTE#
Function
Addresses
15 Data Inputs/Outputs
DQ15 (data input/output, word mode),
A-1 (LSB address input, byte mode)
Chip Enable
Output Enable
Hardware Reset Pin
Ready/Busy Output
Write Enable
Supply Voltage
Ground
Not Connected to anything
Byte/Word Mode
FIGURE 1. LOGIC DIAGRAM
EN29LV400
A0 - A17
DQ0 – DQ15
(A-1)
Reset#
CE#
OE#
WE#
Byte#
RY/BY#
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
3
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. C, Issue Date: 2004/03/18
EN29LV400
TABLE 2A. TOP BOOT BLOCK SECTOR ARCHITECTURE
ADDRESS RANGE
Sector
(X16)
10
9
8
7
6
5
4
3
2
1
0
3E000h-3FFFFh
3D000h-3DFFFh
3C000h-3CFFFh
38000h-3BFFFh
30000h-37FFFh
28000h-2FFFFh
20000h-27FFFh
18000h-1FFFFh
10000h-17FFFh
08000h-0FFFFh
00000h-07FFFh
SECTOR
SIZE
(Kbytes /
Kwords)
16/8
8/4
8/4
32/16
64/32
64/32
64/32
64/32
64/32
64/32
64/32
A17
A16
A15
A14
A13
A12
(X8)
7C000h-7FFFFh
7A000h-7BFFFh
78000h-79FFFh
70000h – 77FFFh
60000h - 6FFFFh
50000h – 5FFFFh
40000h – 4FFFFh
30000h – 3FFFFh
20000h - 2FFFFh
10000h - 1FFFFh
00000h - 0FFFFh
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
1
1
0
1
0
1
0
1
0
1
1
1
0
X
X
X
X
X
X
X
1
0
0
X
X
X
X
X
X
X
X
X
1
0
X
X
X
X
X
X
X
X
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
4
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. C, Issue Date: 2004/03/18
EN29LV400
TABLE 2B. BOTTOM BOOT BLOCK SECTOR ARCHITECTURE
ADDRESS RANGE
Sector
(X16)
10
9
8
7
6
5
4
3
2
1
0
38000h-3FFFFh
30000h-37FFFh
28000h-2FFFFh
20000h-27FFFh
18000h-1FFFFh
10000h-17FFFh
08000h-0FFFFh
04000h-07FFFh
03000h-03FFFh
02000h-02FFFh
00000h-01FFFh
SECTOR
SIZE
(Kbytes/
Kwords)
64/32
64/32
64/32
64/32
64/32
64/32
64/32
32/16
8/4
8/4
16/8
A17
A16
A15
A14
A13
A12
(X8)
70000h –7FFFFh
60000h – 6FFFFh
50000h – 5FFFFh
40000h – 4FFFFh
30000h – 3FFFFh
20000h – 2FFFFh
10000h – 1FFFFh
08000h – 0FFFFh
06000h – 07FFFh
04000h – 05FFFh
00000h – 03FFFh
1
1
1
1
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
0
0
0
1
0
1
0
1
0
1
0
0
0
0
X
X
X
X
X
X
X
1
0
0
0
X
X
X
X
X
X
X
X
1
1
0
X
X
X
X
X
X
X
X
1
0
X
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
5
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. C, Issue Date: 2004/03/18
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