2N7002K
60V N-Channel Enhancement Mode MOSFET - ESD Protected
FEATURES
• R
DS(ON)
, V
GS
@10V,I
DS
@500mA=3Ω
0.120(3.04)
SOT-23
Unit
：
inch(mm)
• Advanced Trench Process Technology
• High Density Cell Design For Ultra Low On-Resistance
• Very Low Leakage Current In Off Condition
• Specially Designed for Battery Operated Systems, Solid-State Relays
Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc.
• ESD Protected 2KV HBM
•
Lead free in comply with EU RoHS 2002/95/EC directives.
• Green molding compound as per IEC61249 Std. . (Halogen Free)
0.056(1.40)
0.047(1.20)
0.110(2.80)
0.006(0.15)MIN.
• R
DS(ON)
, V
GS
@4.5V,I
DS
@200mA=4Ω
0.103(2.60)
0.044(1.10)
0.035(0.90)
0.020(0.50)
0.013(0.35)
0.079(2.00)
0.070(1.80)
0.008(0.20)
0.003(0.08)
MECHANICALDATA
• Case: SOT-23 Package
• Terminals : Solderable per MIL-STD-750,Method 2026
• Apporx. Weight: 0.0003 ounces, 0.0084 grams
• Marking : K72
0.004(0.10)MAX.
Maximum RATINGS and Thermal Characteristics (T
A
=25
O
C unless otherwise noted )
PA RA M E TE R
D ra i n- S o urc e Vo lta g e
G a t e -S o ur c e Vo lt a g e
C o nt i nuo us D ra i n C ur re nt
P uls e d D ra i n C urre nt
1)
S ym b o l
V
DS
V
GS
I
D
I
D M
T
A
= 2 5
O
C
T
A
= 7 5
O
C
P
D
T
J
,T
S TG
R
θ
JA
Limit
60
+20
300
2000
350
210
-5 5 to + 1 5 0
357
Uni ts
V
V
mA
mA
mW
O
M a xi mum P o we r D i s s i p a t i o n
O p e ra t i ng J unc t i o n a nd S t o ra g e Te mp e r a tur e Ra ng e
Junction-to Ambient Thermal Resistance(PCB mounted)
2
C
O
C /W
Note: 1. Maximum DC current limited by the package
2. Surface mounted on FR4 board, t < 5 sec
PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE
October 29,2010-REV.02
PAGE . 1
0.086(2.20)
2N7002K
ELECTRICALCHARACTERISTICS
P a ra me te r
S t a ti c
D ra i n-S o urc e B re a k d o wn Vo lta g e
Ga te Thre s ho ld Vo lta g e
D ra i n-S o urc e On-S t a t e Re s i s ta nc e
D ra i n-S o urc e On-S t a t e Re s i s ta nc e
Ze ro Ga t e Vo lt a g e D ra i n C ur re nt
Gate Body Leakage
Forward Transconductance
Dynamic
To ta l Ga te C ha rg e
Tur n-On Ti me
Tur n-Off Ti me
Inp ut C a p a c i ta nc e
Out p ut C a p a c i t a nc e
Re ve rs e Tra ns fe r C a p a c i ta nc e
S o ur c e -D ra i n D i o d e
D i o d e F o rwa rd Vo lta g e
C o nti nuo us D i o d e F o rwa r d C urr e nt
P uls e D i o d e F o r wa rd C ur re nt
V
SD
I
S
I
S M
I
S
=200mA , V
GS
=0V
-
-
-
-
-
0.82
-
-
1.3
300
2000
V
mA
mA
Q
g
t
on
t
off
C
i ss
C
oss
C
rss
V
D S
= 2 5 V , V
GS
= 0 V
f= 1 .0 M H
Z
V
D S
= 1 5 V, I
D
= 2 0 0 m A
V
GS
=5V
V
DD
=30V , R
L
=150Ω
I
D
=200mA , V
GEN
=10V
R
G
=10Ω
-
-
-
-
-
-
-
-
-
-
-
-
0 .8
20
ns
40
35
10
5
pF
nC
B V
DSS
V
G S ( th)
R
D S ( o n)
R
D S ( o n)
I
D S S
I
GS S
g
fS
V
G S
= 0 V , I
D
= 1 0
μ
A
V
D S
= V
GS
, I
D
= 2 5 0
μ
A
V
GS
=4.5V , I
D
=200mA
V
GS
=10V , I
D
=500mA
V
DS
=60V , V
GS
=0V
V
GS
= + 2 0 V , V
D S
= 0 V
V
D S
= 1 5 V , I
D
= 2 5 0 mA
60
1
-
-
-
-
100
-
-
-
-
-
-
-
-
2 .5
4 .0
Ω
3.0
1
+10
-
μA
μA
mS
V
V
S ymb o l
Te s t C o nd i ti o n
Mi n.
Typ .
Ma x.
Uni ts
Switching
Test Circuit
V
IN
V
DD
R
L
V
OUT
Gate Charge
Test Circuit
V
GS
V
DD
R
L
R
G
1mA
R
G
October 29,2010-REV.02
PAGE . 2
2N7002K
Typical Characteristics Curves (T
A
=25 C,unless otherwise noted)
1.2
O
I
D
-
Drain-to-Source Current
(A)
1
0.8
0.6
0.4
0.2
0
0
1
2
3
I
D
-
Drain Source Current
(A)
V
GS
= 6.0~10V
1.2
5.0V
1
0.8
0.6
0.4
0.2
0
0
V
DS
=10V
4.0V
3.0V
4
5
25
o
C
1
2
3
4
5
6
V
DS
-
Drain-to-Source Voltage (V)
V
GS
-
Gate-to-Source Voltage (V)
Fig. 1-TYPICAL FORWARD CHARACTERISTIC
FIG.1- Output Characteristic
5
5
FIG.2- Transfer Characteristic
R
DS(ON)
- On-Resistance
(
W
)
R
DS(ON)
-
On-Resistance
(
W
)
4
3
2
1
0
V
GS
= 4.5V
4
3
2
1
0
I
D
=200mA
I
D
=500mA
V
GS
=10V
0
0.2
0.4
0.6
0.8
1
2
3
4
5
6
7
8
9
10
I
D
-
Drain Current (A)
V
GS
- Gate-to-Source Voltage (V)
FIG.3- On Resistance vs Drain Current
R
DS(ON)
- On-Resistance(Normalized)
1.8
1.6
1.4
1.2
1
0.8
0.6
-50
FIG.4- On Resistance vs Gate to Source Voltage
V
GS
=10V
I
D
=500mA
-25
0
25
50
75
100
125
150
T
J
- Junction Temperature (
o
C)
FIG.5- On Resistance vs Junction Temperature
October 29,2010-REV.02
PAGE . 3
2N7002K
10
Qg
V
GS
- Gate-to-Source Voltage (V)
Vgs
8
6
4
2
0
0
V
DS=
10V
I
D
=250mA
Vgs(th)
Qg(th)
Qgs
Qsw
Qgd
Qg
0.2
0.4
0.6
0.8
1
Q
g
- Gate Charge (nC)
Fig.6 - Gate Charge Waveform
V
th
- G-S Th r esh o l d Vo l tag e (NORMA L IZED)
Fig.7 - Gate Charge
BV
DSS
- Breakdown Voltage (V)
88
86
84
82
80
78
76
74
72
-50
-25
0
25
50
75
100
o
1.2
1.1
1
0.9
0.8
0.7
-50
I
D
=250
m
A
ID = 250
m
A
-25
0
25
50
75
100
125
150
125
150
T
J
- Junction Temperature ( C)
T
J
- Junction Temperature ( C)
Fig.8 - Threshold Voltage vs Temperature
Fig.9 - Breakdown Voltage vs Junction Temperature
10
V
GS
= 0V
C - Capacitance (pF)
70
60
50
40
30
Ciss
f = 1MHz
V
GS
= 0V
I
S
- Source Current (A)
1
T
J
= 125
o
C
0.1
-55
o
C
20
10
0
0
Crss
5
10
15
20
25
Coss
25
o
C
0.01
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
V
SD
- Source-to-Drain Voltage (V)
VDS - Drain-to-Source Voltage (V)
Fig.10 - Source-Drain Diode Forward Voltage
Fig.11 - Capacitance vs Drain to Source Voltage
October 29,2010-REV.02
PAGE . 4
2N7002K
MOUNTING PAD LAYOUT
SOT-23
0.035 MIN.
(0.90) MIN.
Unit
：
inch(mm)
0.031 MIN.
(0.80) MIN.
0.043
(1.10)
0.037
(0.95)
0.043
(1.10)
0.106
(2.70)
ORDER INFORMATION
• Packing information
T/R - 12K per 13" plastic Reel
T/R - 3K per 7” plastic Reel
LEGAL STATEMENT
Copyright PanJit International, Inc 2012
The information presented in this document is believed to be accurate and reliable. The specifications and information herein are
subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its produ cts for
any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any
license under its patent rights or rights of others.
October 29,2010-REV.02
0.078
(2.00)
PAGE . 5
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