EN29LV320B
EN29LV320B
32 Megabit (4096K x 8-bit / 2048K x 16-bit) Flash Memory
Boot Sector Flash Memory, CMOS 3.0 Volt-only
FEATURES
•
Single power supply operation
- Full voltage range: 2.7 to 3.6 volts read and
write operations
•
High performance
- Access times as fast as 70 ns
•
Low power consumption (typical values at 5
MHz)
- 9 mA typical active read current
- 20 mA typical program/erase current
- Less than 1
μA
current in standby or automatic
sleep mode
•
JEDEC Standard compatible
•
Standard DATA# polling and toggle bits
feature
•
Erase Suspend / Resume modes:
Read and program another Sector during
Erase Suspend Mode
•
Support JEDEC Common Flash Interface
(CFI).
•
Low Vcc write inhibit < 2.5V
•
Minimum 100K program/erase endurance
cycles
•
RESET# hardware reset pin
- Hardware method to reset the device to read
mode
•
WP#/ACC input pin
- Write Protect (WP#) function allows
protection of outermost two boot sectors,
regardless of sector protect status
- Acceleration (ACC) function provides
accelerated program times
•
Package Options
- 48-pin TSOP (Type 1)
- 48 ball 6mm x 8mm TFBGA
•
Industrial Temperature Range
•
Flexible Sector Architecture:
- Eight 8-Kbyte sectors, sixty-three 64k-byte
sectors
- 8-Kbyte sectors for Top or Bottom boot
- Sector/Sector Group protection:
Hardware locking of sectors to prevent
program or erase operations within individual
sectors
Additionally, temporary Sector Group
Unprotect allows code changes in previously
locked sectors
•
-
-
-
High performance program/erase speed
Word program time: 8µs typical
Sector erase time: 100ms typical
Chip erase time: 8s typical
GENERAL DESCRIPTION
The EN29LV320B is a 32-Megabit, electrically erasable, read/write non-volatile flash memory,
organized as 4,194,304 bytes or 2.097,152 words. Any word can be programmed typically in 8µs.
The EN29LV320B features 3.0V voltage read and write operation, with access times as fast as 70ns
to eliminate the need for WAIT states in high-performance microprocessor systems.
The EN29LV320B has separate Output Enable (OE#), Chip Enable (CE#), and Write Enable (WE#)
controls, which eliminate bus contention issues. This device is designed to allow either single Sector
or full Chip erase operation, where each Sector can be individually protected against program/erase
operations or temporarily unprotected to erase or program. The device can sustain a minimum of
100K program/erase cycles on each Sector.
.
This Data Sheet may be revised by subsequent versions
© 2004 Eon Silicon Solution, Inc.,
1
or modifications due to changes in technical specifications.
Rev. C, Issue Date: 2009/10/28
www.eonssi.com
EN29LV320B
TABLE 1. PIN DESCRIPTION
LOGIC DIAGRAM
Pin Name
A0-A20
DQ0-DQ14
DQ15 / A-1
CE#
OE#
WE#
WP#/ACC
RESET#
BYTE#
RY/BY#
Vcc
Vss
NC
Function
21 Address inputs
15 Data Inputs/Outputs
DQ15 (data input/output, in word mode),
A-1 (LSB address input, in byte mode)
Chip Enable
Output Enable
Write Enable
Write Protect / Acceleration Pin
Hardware Reset Pin
Byte/Word mode selection
Ready/Busy Output
Supply Voltage
(2.7-3.6V)
Ground
Not Connected to anything
EN29 LV320
A0 – A20
WP#/ACC
RESET#
CE#
OE#
WE#
BYTE#
RY/BY#
DQ0 – DQ15
(A-1)
This Data Sheet may be revised by subsequent versions
© 2004 Eon Silicon Solution, Inc.,
3
or modifications due to changes in technical specifications.
Rev. C, Issue Date: 2009/10/28
www.eonssi.com
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