DDR2 ECC UNBUFFERED
VLP MINI-DIMM with PLL
MODULE CONFIGURATIONS
V/I Part Number
VR5WP647218EBP
VR5WP647218EBS
VR5WP647218EBW
VR5WP647218EBY
VR5WP287218FBP
VR5WP287218FBS
VR5WP287218FBW
VR5WP287218FBY
VR5WP567218GBP
VR5WP567218GBS
VR5WP567218GBW
VR5WP567218GBY
VR5WP567218FEP
VR5WP567218FES
VR5WP567218FEW
Notes:
Capacity
512MB
512MB
512MB
512MB
1GB
1GB
1GB
1GB
2GB
2GB
2GB
2GB
2GB
2GB
2GB
Module
Configuration
64Mx72
64Mx72
64Mx72
64Mx72
128Mx72
128Mx72
128Mx72
128Mx72
256Mx72
256Mx72
256Mx72
256Mx72
256Mx72
256Mx72
256Mx72
Device
Configuration
64M x 8 (9)
64M x 8 (9)
64M x 8 (9)
64M x 8 (9)
128M x 8 (9)
128M x 8 (9)
128M x 8 (9)
128M x 8 (9)
256M x 8 (9)
256M x 8 (9)
256M x 8 (9)
256M x 8 (9)
128M x 8 x 2 (9)
128M x 8 x 2 (9)
128M x 8 x 2 (9)
Device
Package
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
DDP FBGA
DDP FBGA
DDP FBGA
Module
Ranks
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
Performance
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-3200
PC2-4200
PC2-5300
CAS
Latency
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
Features
•
•
•
•
•
•
•
•
•
•
Single 1.8V
±
0.1V Power Supply
Burst Length (4, 8)
Burst type (Sequential & Interleave)
Auto & Self-Refresh.
8k/64ms Refresh Period.
Differential CLK (#CLK) input.
On-die termination (ODT)
Off-chip driver (OCD) impedance calibration
Serial Presence Detect with EEPROM.
RoHS Compliant* (see last page)
Viking Modular Solutions♦20091 Ellipse♦Foothill Ranch, CA 92610
Tel (800) 338-2361 Fax (949) 666-8159♦Website: http://www.vikingmodular.com
This Data Sheet is subject to change without notice.
Doc. # PS5WPxx7218xxx-LF Revision D Created By: Brian Ouellette
Page 1 of 15
DDR2 ECC UNBUFFERED
VLP MINI-DIMM with PLL
PIN CONFIGURATIONS
Pin
Front
Side
Pin
Back
Side
Pin
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
Front
Side
VSS
DQ24
DQ25
VSS
/DQS3
DQS3
VSS
DQ26
DQ27
VSS
CB0
CB1
VSS
/DQS8
DQS8
VSS
CB2
CB3
VSS
NC
VDDQ
CKE0
VDD
†BA2
NC
VDDQ
A11
A7
VDD
A5
A4
Pin
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
Back
Side
DQ28
DQ29
VSS
DM3
NC
VSS
DQ30
DQ31
VSS
CB4
CB5
VSS
DM8
NC
VSS
CB6
CB7
VSS
NC
VDDQ
**CKE1
VDD
*A15
*A14
VDDQ
A12
A9
VDD
A8
A6
VDDQ
Pin
63
64
65
Front Side
VDDQ
A2
VDD
Pin
Back Side
A3
A1
VDD
Pin
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
Front Side
DQ41
VSS
/DQS5
DQS5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
SA2
NC
VSS
/DQS6
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
/DQS7
DQS7
VSS
DQ58
DQ59
VSS
SA0
SA1
Pin
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
Back
Side
VSS
DM5
NC
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK2
/CK2
VSS
DM6
NC
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DM7
NC
VSS
DQ62
DQ63
VSS
SDA
SCL
VDDSPD
1
VREF
123
VSS
2
VSS
124
DQ4
3
DQ0
125
DQ5
4
DQ1
126
VSS
5
VSS
127
DM0
6
/DQS0
128
NC
7
DQS0
129
VSS
8
VSS
130
DQ6
9
DQ2
131
DQ7
10
DQ3
132
VSS
11
VSS
133
DQ12
12
DQ8
134
DQ13
13
DQ9
135
VSS
14
VSS
136
DM1
15
/DQS1
137
NC
16
DQS1
138
VSS
17
VSS
139
CK1
18 */RESET 140
/CK1
19
NC
141
VSS
20
VSS
142
DQ14
21
DQ10
143
DQ15
22
DQ11
144
VSS
23
VSS
145
DQ20
24
DQ16
146
DQ21
25
DQ17
147
VSS
26
VSS
148
DM2
27
/DQS2
149
NC
28
DQS2
150
VSS
29
VSS
151
DQ22
30
DQ18
152
DQ23
31
DQ19
153
VSS
*Pins are not used in this module
** Pins are used for 2 rank modules
† Pin used for 1Gbit devices (7218F)
185
186
187
KEY
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
VSS
VSS
NC
VDD
A10/AP
BA0
VDD
/WE
VDDQ
/CAS
VDDQ
*/S1
**ODT1
VDDQ
NC
VSS
DQ32
DQ33
VSS
/DQS4
DQS4
VSS
DQ34
DQ35
VSS
DQ40
CK0
/CK0
VDD
A0
BA1
VDD
/RAS
VDDQ
/S0
VDDQ
ODT0
A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
NC
VSS
DQ38
DQ39
VSS
DQ44
DQ45
Viking Modular Solutions♦20091 Ellipse♦Foothill Ranch, CA 92610
Tel (800) 338-2361 Fax (949) 666-8159♦Website: http://www.vikingmodular.com
This Data Sheet is subject to change without notice.
Doc. # PS5WPxx7218xxx-LF Revision D Created By: Brian Ouellette
Page 2 of 15
DDR2 ECC UNBUFFERED
VLP MINI-DIMM with PLL
PIN FUNCTION DESCRIPTION
SYMBOL
CK0 ~ CK2
/CK0 ~ /CK2
TYPE
IN
POLARITY
Positive Edge
Negative Edge
DESCRIPTION
Clock: CK and /CK are differential clock inputs. All addresses and control input
signals are sampled on the crossing of the positive edge of CK and negative
edge of /CK. Output data (DQs, DQS and /DQS) is referenced to the crossings
of CK and /CK.
CKE0, CKE1
IN
Active High
/S0 ~ /S3
IN
Active Low
ODT0, ODT1
/RAS, /CAS,
/WE
VREF
VDDQ
BA [2:0]
IN
IN
Supply
Supply
IN
Active High
Active Low
-
A [An:0]
IN
-
CKE HIGH activates, and CKE LOW deactivates internal clock signals,
and device input buffers and output drivers of the SDRAMs. Taking
CKE LOW provides PRECHARGE POWER-DOWN and SELF
REFRESH operation (all banks idle), or ACTIVE POWER DOWN (row
ACTIVE in any bank)
Enables the associated SDRAM command decoder when low and
disables decoder when high. When decoder is disabled, new
commands are ignored and previous operations continue. These input
signals also disable all outputs (except CKE and ODT) of the register(s)
on the DIMM when both inputs are high. When both S[0:3] are high, all
register outputs (except CKE, ODT and Chip select) remain in the
previous state.
On-Die Termination control signals
CAS, WE When sampled at the positive rising edge of the clock, /CAS,
/RAS, and /WE define the operation to be executed by the SDRAM.
Reference voltage for SSTL18 inputs
Isolated power supply for the DDR SDRAM output buffers to provide
improved noise immunity
Selects which SDRAM bank of four or eight is activated.
During a Bank Activate command cycle, Address defines the row
address. During a Read or Write command cycle, Address defines the
column address. In addition to the column address, AP is used to
invoke autoprecharge operation at the end of the burst read or write
cycle. If AP is high, autoprecharge is selected and BA0, BA1, BA2
defines the bank to be precharged. If AP is low, autoprecharge is
disabled. During a Precharge command cycle, AP is used in
conjunction with BA0, BA1,BA2 to control which bank(s) to precharge. If
AP is high, all banks will be precharged regardless of the state of BA0
or BA1. If AP is low, BA0 and BA1 are used to define which bank to
precharge.
Data and Check Bit Input/Output pins
Masks write data when high, issued concurrently with input data.
Power and ground for the DDR SDRAM input buffers and core logic.
Positive line of the differential data strobe for input and output data.
Negative line of the differential data strobe for input and output data.
These signals are tied at the system planar to either VSS or VDDSPD
to configure the serial SPD EEPROM address range.
DQ [63:0],
CB [7:0]
DM [8:0]
VDD, VSS
DQS [17:0]
/DQS [17:0]
SA [2:0]
I/O
IN
Supply
I/O
I/O
IN
-
Active High
-
Positive Edge
Negative
Edge
-
Viking Modular Solutions♦20091 Ellipse♦Foothill Ranch, CA 92610
Tel (800) 338-2361 Fax (949) 666-8159♦Website: http://www.vikingmodular.com
This Data Sheet is subject to change without notice.
Doc. # PS5WPxx7218xxx-LF Revision D Created By: Brian Ouellette
Page 3 of 15
DDR2 ECC UNBUFFERED
VLP MINI-DIMM with PLL
PIN FUNCTION DESCRIPTION
SYMBOL
SDA
SCL
VDDSPD
TYPE
I/O
IN
Supply
POLARITY
-
-
-
DESCRIPTION
This bidirectional pin is used to transfer data into or out of the SPD
EEPROM. A resistor must be connected from the SDA bus line to
VDDSPD on the system planar to act as a pullup.
This signal is used to clock data into and out of the SPD EEPROM. A
resistor may be connected from the SCL bus time to VDDSPD on the
system planar to act as a pullup.
Serial EEPROM positive power supply (wired to a separate power pin
at the connector, which supports from 1.7 Volt to 3.6 Volt (nominal 1.8
Volt, 2.5 Volt and 3.3 Volt) operations.
Viking Modular Solutions♦20091 Ellipse♦Foothill Ranch, CA 92610
Tel (800) 338-2361 Fax (949) 666-8159♦Website: http://www.vikingmodular.com
This Data Sheet is subject to change without notice.
Doc. # PS5WPxx7218xxx-LF Revision D Created By: Brian Ouellette
Page 4 of 15
DDR2 ECC UNBUFFERED
VLP MINI-DIMM with PLL
MECHANICAL OUTLINE
Dimensions are in inches. (Tolerance is +/- 0.005, unless otherwise stated.)
Viking Modular Solutions♦20091 Ellipse♦Foothill Ranch, CA 92610
Tel (800) 338-2361 Fax (949) 666-8159♦Website: http://www.vikingmodular.com
This Data Sheet is subject to change without notice.
Doc. # PS5WPxx7218xxx-LF Revision D Created By: Brian Ouellette
Page 5 of 15
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