DDR2 UNBUFFERED DIMM
VR5EUxxxx18xBx
MODULE CONFIGURATIONS – NON-ECC
V/I Part Number
VR5EU646418EBP
VR5EU646418EBS
VR5EU646418EBW
VR5EU646418EBY
VR5EU286418EBP
VR5EU286418EBS
VR5EU286418EBW
VR5EU286418EBY
VR5EU286418FBP
VR5EU286418FBS
VR5EU286418FBW
VR5EU286418FBY
VR5EU286418FBZ
VR5EU286418FBA*
VR5EU566418FBP
VR5EU566418FBS
VR5EU566418FBW
VR5EU566418FBY
VR5EU566418FBZ
VR5EU566418FBA*
VR5EU566418GBP
VR5EU566418GBS
VR5EU566418GBW
VR5EU566418GBY
VR5EU566418GBZ
VR5EU126418GBP
VR5EU126418GBS
VR5EU126418GBW
VR5EU126418GBY
VR5EU126418GBZ
*Preliminary
Capacity
512MB
512MB
512MB
512MB
1GB
1GB
1GB
1GB
1GB
1GB
1GB
1GB
1GB
1GB
2GB
2GB
2GB
2GB
2GB
2GB
2GB
2GB
2GB
2GB
2GB
4GB
4GB
4GB
4GB
4GB
Module
Configuration
64MX64
64MX64
64MX64
64MX64
128MX64
128MX64
128MX64
128MX64
128MX64
128MX64
128MX64
128MX64
128MX64
128MX64
256MX64
256MX64
256MX64
256MX64
256MX64
256MX64
256MX64
256MX64
256MX64
256MX64
256MX64
512MX64
512MX64
512MX64
512MX64
512MX64
Device
Configuration
64M x 8 (8)
64M x 8 (8)
64M x 8 (8)
64M x 8 (8)
64M x 8 (16)
64M x 8 (16)
64M x 8 (16)
64M x 8 (16)
128M x 8 (8)
128M x 8 (8)
128M x 8 (8)
128M x 8 (8)
128M x 8 (8)
128M x 8 (8)
128M x 8 (16)
128M x 8 (16)
128M x 8 (16)
128M x 8 (16)
128M x 8 (16)
128M x 8 (16)
256M x 8 (8)
256M x 8 (8)
256M x 8 (8)
256M x 8 (8)
256M x 8 (8)
256M x 8 (16)
256M x 8 (16)
256M x 8 (16)
256M x 8 (16)
256M x 8 (16)
Device
Package
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
Module
Ranks
1
1
1
1
2
2
2
2
1
1
1
1
1
1
2
2
2
2
2
2
1
1
1
1
1
2
2
2
2
2
Performance
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-6400
PC2-8500
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-6400
PC2-8500
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-6400
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-6400
CAS
Latency
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL6 (6-6-6)
CL7 (7-7-7)
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL6 (6-6-6)
CL7 (7-7-7)
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL6 (6-6-6)
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL6 (6-6-6)
Viking Modular Solutions♦20091 Ellipse♦Foothill Ranch, CA 92610
Tel (800) 338-2361 Fax (949) 666-8159♦Website: http://www.vikingmodular.com
This Data Sheet is subject to change without notice.
Doc. # PS5EUxxxx18xBx Revision D Created By: Brian Ouellette
Page 1 of 22
DDR2 UNBUFFERED DIMM
VR5EUxxxx18xBx
MODULE CONFIGURATIONS - ECC
V/I Part Number
VR5EU647218EBP
VR5EU647218EBS
VR5EU647218EBW
VR5EU647218EBY
VR5EU287218EBP
VR5EU287218EBS
VR5EU287218EBW
VR5EU287218EBY
VR5EU287218FBP
VR5EU287218FBS
VR5EU287218FBW
VR5EU287218FBY
VR5EU287218FBZ
VR5EU287218FBA*
VR5EU567218FBP
VR5EU567218FBS
VR5EU567218FBW
VR5EU567218FBY
VR5EU567218FBZ
VR5EU567218FBA*
VR5EU567218GBP
VR5EU567218GBS
VR5EU567218GBW
VR5EU567218GBY
VR5EU567218GBZ
VR5EU127218GBP
VR5EU127218GBS
VR5EU127218GBW
VR5EU127218GBY
VR5EU127218GBZ
*Preliminary
Capacity
512MB
512MB
512MB
512MB
1GB
1GB
1GB
1GB
1GB
1GB
1GB
1GB
1GB
1GB
2GB
2GB
2GB
2GB
2GB
2GB
2GB
2GB
2GB
2GB
2GB
4GB
4GB
4GB
4GB
4GB
Module
Configuration
64Mx72
64Mx72
64Mx72
64Mx72
128Mx72
128Mx72
128Mx72
128Mx72
128Mx72
128Mx72
128Mx72
128Mx72
128Mx72
128Mx72
256Mx72
256Mx72
256Mx72
256Mx72
256Mx72
256Mx72
256Mx72
256Mx72
256Mx72
256Mx72
256Mx72
512Mx72
512Mx72
512Mx72
512Mx72
512Mx72
Device
Configuration
64M x 8 (9)
64M x 8 (9)
64M x 8 (9)
64M x 8 (9)
64M x 8 (18)
64M x 8 (18)
64M x 8 (18)
64M x 8 (18)
128M x 8 (9)
128M x 8 (9)
128M x 8 (9)
128M x 8 (9)
128M x 8 (9)
128M x 8 (9)
128M x 8 (18)
128M x 8 (18)
128M x 8 (18)
128M x 8 (18)
128M x 8 (18)
128M x 8 (18)
256M x 8 (9)
256M x 8 (9)
256M x 8 (9)
256M x 8 (9)
256M x 8 (9)
256M x 8 (18)
256M x 8 (18)
256M x 8 (18)
256M x 8 (18)
256M x 8 (18)
Device
Package
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
Module
Ranks
1
1
1
1
2
2
2
2
1
1
1
1
1
1
2
2
2
2
2
2
1
1
1
1
1
2
2
2
2
2
Performance
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-6400
PC2-8500
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-6400
PC2-8500
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-6400
PC2-3200
PC2-4200
PC2-5300
PC2-6400
PC2-6400
CAS
Latency
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL6 (6-6-6)
CL7 (7-7-7)
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL6 (6-6-6)
CL7 (7-7-7)
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL6 (6-6-6)
CL3 (3-3-3)
CL4 (4-4-4)
CL5 (5-5-5)
CL5 (5-5-5)
CL6 (6-6-6)
Viking Modular Solutions♦20091 Ellipse♦Foothill Ranch, CA 92610
Tel (800) 338-2361 Fax (949) 666-8159♦Website: http://www.vikingmodular.com
This Data Sheet is subject to change without notice.
Doc. # PS5EUxxxx18xBx Revision D Created By: Brian Ouellette
Page 2 of 22
DDR2 UNBUFFERED DIMM
VR5EUxxxx18xBx
Features
•
•
•
•
•
•
•
•
•
•
•
240 pin Unbuffered DIMM
Single 1.8V
±
0.1V Power Supply
Burst Length (4, 8)
Burst type (Sequential & Interleave)
Auto & Self-Refresh.
8k/64ms Refresh Period.
Differential CLK (#CLK) input.
On-die termination (ODT)
Off-chip driver (OCD) impedance calibration
Serial Presence Detect with EEPROM.
RoHS Compliant* (see last page)
Viking Modular Solutions♦20091 Ellipse♦Foothill Ranch, CA 92610
Tel (800) 338-2361 Fax (949) 666-8159♦Website: http://www.vikingmodular.com
This Data Sheet is subject to change without notice.
Doc. # PS5EUxxxx18xBx Revision D Created By: Brian Ouellette
Page 3 of 22
DDR2 UNBUFFERED DIMM
VR5EUxxxx18xBx
PIN CONFIGURATIONS
Pin
Front
Side
Pin
Back
Side
Pin
Front
Side
Pin
Back
Side
Pin
Front Side
Pin
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
Back Side
VDDQ
A3
A1
VDD
CK0
/CK0
VDD
A0
VDD
BA1
VDDQ
/RAS
/S0
VDDQ
ODT0
†A13
VDD
VSS
DQ36
DQ37
VSS
DM4
*/DQS13
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
Pin
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
Front Side
VSS
/DQS5
DQS5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
SA2
NC
VSS
/DQS6
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
/DQS7
DQS7
VSS
DQ58
DQ59
VSS
SDA
SCL
Pin
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
Back
Side
DM5
*/DQS14
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK2
/CK2
VSS
DM6
*/DQS15
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DM7
*/DQS16
VSS
DQ62
DQ63
VSS
VDDSPD
SA0
SA1
1
VREF
121
VSS
31
DQ19
151
VSS
61
A4
2
VSS
122
DQ4
32
VSS
152
DQ28
62
VDDQ
3
DQ0
123
DQ5
33
DQ24
153
DQ29
63
A2
4
DQ1
124
VSS
34
DQ25
154
VSS
64
VDD
5
VSS
125
DM0
35
VSS
155
DM3
65
VSS
6
/DQS0
126
*/DQS9
36
/DQS3
156 */DQS12 66
VSS
7
DQS0
127
VSS
37
DQS3
157
VSS
67
VDD
8
VSS
128
DQ6
38
VSS
158
DQ30
68
*PAR_IN
9
DQ2
129
DQ7
39
DQ26
159
DQ31
69
VDD
10
DQ3
130
VSS
40
DQ27
160
VSS
70
A10/AP
11
VSS
131
DQ12
41
VSS
161
§CB4
71
BA0
12
DQ8
132
DQ13
42
§CB0
162
§CB5
72
VDDQ
13
DQ9
133
VSS
43
§CB1
163
VSS
73
/WE
14
VSS
134
DM1
44
VSS
164
§DM8
74
/CAS
15
/DQS1
135 */DQS10
45
§/DQS8
165 */DQS17 75
VDDQ
16
DQS1
136
VSS
46
§DQS8
166
VSS
76
**/S1
17
VSS
137
CK1
47
VSS
167
§CB6
77
**ODT1
18 */RESET 138
/CK1
48
§CB2
168
§CB7
78
VDDQ
19
NC
139
VSS
49
§CB3
169
VSS
79
VSS
20
VSS
140
DQ14
50
VSS
170
VDDQ
80
DQ32
21
DQ10
141
DQ15
51
VDDQ
171 **CKE1
81
DQ33
22
DQ11
142
VSS
52
CKE0
172
VDD
82
VSS
23
VSS
143
DQ20
53
VDD
173
*A15
83
/DQS4
24
DQ16
144
DQ21
54
174
84
DQS4
†BA2
†A14
25
DQ17
145
VSS
55
*ERR_OUT
175
VDDQ
85
VSS
26
VSS
146
DM2
56
VDDQ
176
A12
86
DQ34
27
/DQS2
147 */DQS11
57
A11
177
A9
87
DQ35
28
DQS2
148
VSS
58
A7
178
VDD
88
VSS
29
VSS
149
DQ22
59
VDD
179
A8
89
DQ40
30
DQ18
150
DQ23
60
A5
180
A6
90
DQ41
* Pins are not used in this module
§ Pins are used for ECC modules
** Pins are used for 2 rank modules
†
BA2 & A13 used for 1Gb based module. BA2, A13 & A14 used for 2Gb based module.
Viking Modular Solutions♦20091 Ellipse♦Foothill Ranch, CA 92610
Tel (800) 338-2361 Fax (949) 666-8159♦Website: http://www.vikingmodular.com
This Data Sheet is subject to change without notice.
Doc. # PS5EUxxxx18xBx Revision D Created By: Brian Ouellette
Page 4 of 22
DDR2 UNBUFFERED DIMM
VR5EUxxxx18xBx
PIN FUNCTION DESCRIPTION
SYMBOL
CK0, CK1
/CK0, /CK1
CKE0 ~ CKE1
TYPE
IN
POLARITY
Positive Edge
Negative Edge
Active High
DESCRIPTION
Clock: CK and /CK are differential clock inputs. All addresses and control input
signals are sampled on the crossing of the positive edge of CK and negative edge of
/CK. Output data (DQs, DQS and /DQS) is referenced to the crossings of CK and /CK.
CKE HIGH activates, and CKE LOW deactivates internal clock signals, and device
input buffers and output drivers of the SDRAMs. Taking CKE LOW provides
PRECHARGE POWER-DOWN and SELF REFRESH operation (all banks idle), or
ACTIVE POWER DOWN (row ACTIVE in any bank)
Enables the associated SDRAM command decoder when low and disables decoder
when high. When decoder is disabled, new commands are ignored and previous
operations continue. These input signals also disable all outputs (except CKE and
ODT) of the register(s) on the DIMM when both inputs are high. When both S[0:1] are
high, all register outputs (except CKE, ODT and
Chip select) remain in the previous state.
On-Die Termination control signals
CAS, WE When sampled at the positive rising edge of the clock, /CAS, /RAS, and /WE
define the operation to be executed by the SDRAM.
Reference voltage for SSTL18 inputs
Isolated power supply for the DDR SDRAM output buffers to provide improved noise
immunity
Selects which SDRAM bank of four or eight is activated.
During a Bank Activate command cycle, Address defines the row address. During a
Read or Write command cycle, Address defines the column address. In addition to the
column address, AP is used to invoke autoprecharge operation at the end of the burst
read or write cycle. If AP is high, autoprecharge is selected and BA0, BA1, BA2
defines the bank to be precharged. If AP is low, autoprecharge is disabled. During a
Precharge command cycle, AP is used in conjunction with BA0, BA1, and BA2 to
control which bank(s) to precharge. If AP is high, all banks will be precharged
regardless of the state of BA0 or BA1 or BA2. If AP is low, BA0 and BA1 and BA2 are
used to define which bank to precharge.
Data Input/Output pins
Masks write data when high, issued concurrently with input data.
Power and ground for the DDR SDRAM input buffers and core logic.
Positive line of the differential data strobe for input and output data.
Negative line of the differential data strobe for input and output data.
The optional EVENT pin is reserved for use to flag critical module temperatures and is
used in conjunction with a SPD temperature sensing option.
These signals are tied at the system planar to either VSS or VDDSPD to configure the
serial SPD EEPROM address range.
This bi-directional pin is used to transfer data into or out of the SPD EEPROM. A
resistor must be connected from the SDA bus line to VDDSPD on the system planar to
act as a pull-up.
This signal is used to clock data into and out of the SPD EEPROM. A resistor may be
connected from the SCL bus time to VDDSPD on the system planar to act as a pull-up.
Serial EEPROM positive power supply (wired to a separate power pin at the connector,
which supports from 1.7 Volt to 3.6 Volt (nominal 1.8 Volt, 2.5 Volt and 3.3 Volt)
operations.
IN
/S0 ~ /S1
IN
Active Low
ODT0 ~ ODT1
/RAS, /CAS, /WE
VREF
VDD
BA [2:0]
IN
IN
Supply
Supply
IN
Active High
Active Low
-
A [14:0]
IN
-
DQ [63:0]
DM [8:0]
VDD, GND
DQS [7:0]
/DQS [7:0]
/EVENT
SA [1:0]
SDA
SCL
VDDSPD
I/O
IN
Supply
I/O
I/O
Out
IN
I/O
IN
Supply
-
Active High
-
Positive Edge
Negative Edge
-
-
-
-
-
Viking Modular Solutions♦20091 Ellipse♦Foothill Ranch, CA 92610
Tel (800) 338-2361 Fax (949) 666-8159♦Website: http://www.vikingmodular.com
This Data Sheet is subject to change without notice.
Doc. # PS5EUxxxx18xBx Revision D Created By: Brian Ouellette
Page 5 of 22
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