BL8509B
Ultra-small package High-precision Voltage Detector with delay
circuit, BL8509B Series
General Description
BL8509B Series
is a series of high-precision voltage
detectors with a built-in delay time generator of fixed
time developed using CMOS process. Internal
oscillator and counter timer can delay the release
signal without external parts. Detect voltage is
extremely accurate with minimal temperature drift.
CMOS output configurations are available.
Features
Highly accuracy： ±2%
Low power consumption：TYP 0.9uA (V
DD
=3V)
Detect voltage range：1.0V~6.5V in 0.1V increments
Operating voltage range：0.7V~7V
Detect voltage temperature characteristics：
TYP±100ppm/℃
Output configuration： CMOS
Package： SOT-23，SOT-23-3，SOT-23-5
Selection Guide
BL8509B-
XXX X X XX
Typical Application
Power monitor for portable equipment such as
notebook computers, digital still cameras, PDA, and
Package type：
RM：SOT-23-3
RN：SOT-23-5
RO：SOT-23
Output type：
N：Nch
C：CMOS
Delay time：
A：50mS
B：100mS
C：150mS
D：200mS
E：250mS
F：300mS
G：400mS
Detector voltage：
090……0.9V
100……1.0V
263……2.63V
300……3.0V
465……4.65V
……
600……6.0V
cellular phones
Constant voltage power monitor for cameras, video
equipment and communication devices.
Power monitor for microcomputers and reset for
CPUs.
System battery life and charge voltage monitors
Typical Application Circuit
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BL8509B
Absolute Maximum Ratings
PARAMETER
V
DD
Input Voltage
Output Current
Output Voltage
Continuous Total
Power Dissipation
CMOS
SOT-23-3
SOT-23-5
SYMBAL
V
DD
I
OUT
V
OUT
Pd
T
Opr
T
stg
T
solder
RATINGS
8
50
Vss-0.3~ V
DD
+0.3
300
-40~+85
-40~+125
260
℃
, 10s
UNITS
V
mA
V
mW
℃
℃
Operating Ambient Temperature
Storage Temperature
Soldering temperature and time
Electrical Characteristics：
：
(-V
DET
(S)=1.0V to 6.5V±2% ,Ta=25
O
C , unless otherwise noted)
Test
circuit
Parameter
Detect
Voltage
Hysteresis
Range
Symbol
-VDET
VHYS
Conditions
-
-
VDD=3V (below 2.5V)
Min
.
-VDET（S）
×0.98
0.03
-
-
-
0.01
Typ
-VDET(S)
0.06
0.9
1.4
1.8
0.19
Max.
-VDET(S)
×1.02
0.1
1.5
2.8
3.6
--
Units
V
1
V
Supply
Current
ISS
VDD=5V (2.5V-4.5V)
VDD=7V (4.5V-6.5V)
uA
2
Iout
N-ch
Output
Current
VDS=0.5V VDD=0.7V
mA
3
Iout
P-ch
VDS=0.5V VDD=7V
1.7
3.4
--
mA
V
ms
us
ppm/℃
4
Operating
voltage
Delay time
Temperature
characteristics
VDD
Td1
Td2
∆ −
VDET
∆
Ta
• −
VDET
-
VDD=-VDET+1V DS low
VDD=-VDET+1V DS high
0.7
130
110
-
-
200
220
±100
7
290
330
±350
1
1
5
1
∆
Ta
=-40℃ ~ 85℃
Note： 1、-VDET(S)
：Specified
Detection Voltage value
2、-VDET
：Actual
Detection Voltage value
3、Release Voltage：+VDET=-VDET+VHYS
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V1.2
BL8509B
Functional Description：
：
1.
Basic Operation: CMOS Output (Active Low)
1-1. When the power supply voltage (VDD) is higher than the release voltage (+VDET), the Nch transistor is OFF and
the Pch transistor is ON to provide VDD (high) at the output. Since the Nch transistor N1 in Figure 1 is OFF, the
(
R
B
+
R
C
)
•
VDD
R
A
+
R
B
+
R
C
.
comparator input voltage is
1-2. When the VDD goes below +VDET, the output provides the VDD level, as long as VDD remains above the
detection voltage (–VDET). When the VDD falls below –VDET (point A in Figure 2), the Nch transistor
becomes ON, the Pch transistor becomes OFF, and the VSS level appears at the output. At this time the Nch
R
B
•
VDD
R
+
R
B
.
transistor N1 in Figure 1 becomes ON, the comparator input voltage is changed to
A
1-3. When the VDD falls below the minimum operating voltage, the output becomes undefined, or goes to VDD when
the output is pulled up to VDD.
1-4. The VSS level appears when VDD rises above the minimum operating voltage. The VSS level still appears
even when VDD surpasses the –VDET, as long as it does not exceed the release voltage +VDET.
1-5. When VDD rises above +VDET (point B in Figure 2), the Nch transistor becomes OFF and the Pch transistor
becomes ON to provide VDD at the output. The VDD at the OUT pin is delayed for Td due to the delay circuit.
2.
Delay Circuit
2-1. Delay Time
The delay circuit delays the output signal from the time at which the power voltage (VDD) exceeds the release
voltage (+VDET) when VDD is turned on. The output signal is not delayed when the VDD goes below the
detection voltage (–VDET). (Refer to Figure 2.) The delay time (t
D
) is a fixed value that is determined by a built-in
oscillation circuit and counter.
2-2. DS Pin (ON/OFF Switch Pin for Delay Time)
The DS pin should be connected to Low or High. When the DS pin is High, the output delay time becomes
short since the output signal is taken from the middle of counter circuit (Refer to Figure 3).
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