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ES29LV320ET-90WG

产品描述Flash, 2MX16, 90ns, PBGA48
产品类别存储    存储   
文件大小746KB,共58页
制造商优先(苏州)半导体
官网地址http://www.excel-semi.com/
标准
下载文档 详细参数 全文预览

ES29LV320ET-90WG概述

Flash, 2MX16, 90ns, PBGA48

ES29LV320ET-90WG规格参数

参数名称属性值
是否Rohs认证符合
厂商名称优先(苏州)半导体
包装说明FBGA, BGA48,6X8,32
Reach Compliance Codeunknown
最长访问时间90 ns
备用内存宽度8
启动块TOP
命令用户界面YES
通用闪存接口YES
数据轮询YES
JESD-30 代码R-PBGA-B48
内存密度33554432 bit
内存集成电路类型FLASH
内存宽度16
部门数/规模8,63
端子数量48
字数2097152 words
字数代码2000000
最高工作温度70 °C
最低工作温度
组织2MX16
封装主体材料PLASTIC/EPOXY
封装代码FBGA
封装等效代码BGA48,6X8,32
封装形状RECTANGULAR
封装形式GRID ARRAY, FINE PITCH
并行/串行PARALLEL
电源3/3.3 V
认证状态Not Qualified
就绪/忙碌YES
部门规模8K,64K
最大待机电流0.00005 A
最大压摆率0.03 mA
表面贴装YES
技术CMOS
温度等级COMMERCIAL
端子形式BALL
端子节距0.8 mm
端子位置BOTTOM
切换位YES
类型NOR TYPE

ES29LV320ET-90WG文档预览

E S I
I
ES
Excel Semiconductor inc.
ES29LV320E
32Mbit(4M x 8/2M x 16)
CMOS 3.0 Volt-only, Boot Sector Flash Memory
GENERAL FEATURES
• Single power supply operation
- 2.7V ~ 3.6V for read, program and erase operations
• Minimum 100,000 program/erase cycles per sector
• 20 Year data retention at 125
o
C
SOFTWARE FEATURES
• Sector Structure
- 8Kbyte x 8 boot sectors
- 64Kbyte x 63 sectors
- 256byte security sector
• Top or Bottom boot block
- ES29LV320ET for Top boot block device
- ES29LV320EB for Bottom boot block device
• A 256 bytes of extra sector for security code
- Factory locked
- Customer lockable
• Package Options
- 48-pin TSOP
- 48-ball FBGA
- Pb-free packages
- All Pb-free products are RoHS-Compliant
• Low Vcc write inhibit
• Manufactured on 0.18um process technology
• Compatible with JEDEC standards
- Pinout and software compatible with single-power
supply flash standard
Erase Suspend / Erase Resume
Data# poll and toggle for Program/erase status
CFI ( Common Flash Interface) supported
Unlock Bypass Program
Autoselect mode
Auto-sleep mode after t
ACC
+ 30ns
HARDWARE FEATURES
• Hardware reset input pin (RESET#)
- Provides a hardware reset to device
- Any internal device operation is terminated and the
device returns to read mode by the reset
• Ready/Busy# output pin (RY/BY#)
- Provides a program or erase operational status
about whether it is finished for read or still being
progressed
• WP#/ACC input pin
- Two outermost boot sectors are protected when
WP# is set to low, regardless of sector protection
- Program speed is accelerated by raising WP#/ACC
to a high voltage (11.5V~12.5V)
• Sector protection / unprotection (RESET# , A9 )
- Hardware method of locking a sector to prevent
any program or erase operation within that sector
- Two methods are provided :
- In-system method by RESET# pin
- A9 high-voltage method for PROM programmers
• Temporary Sector Unprotection (RESET# )
- Allows temporary unprotection of previously
protected sectors to change data in-system
DEVICE PERFORMANCE
• Read access time
- 70ns/90ns for normal Vcc range ( 2.7V ~ 3.6V )
• Program and erase time
- Program time : 6us/byte, 8us/word ( typical )
- Accelerated program time : 4us/word ( typical )
- Sector erase time : 0.7sec/sector ( typical )
• Power consumption (typical values)
- 15uA in standby or automatic sleep mode
- 10mA active read current at 5MHz
- 15mA active write current during program or erase
ES29LV320E
1
Rev. 0A May 25, 2006
E S I
I
ES
Excel Semiconductor inc.
GENERAL PRODUCT DESCRIPTION
The ES29LV320 is a 32 megabit, 3.0 volt-only flash
memory device, organized as 4M x 8 bits (Byte
mode) or 2M x 16 bits (Word mode) which is config-
urable by BYTE#. Eight boot sectors and sixty three
main sectors with uniform size are provided :
8Kbytes x 8 and 64Kbytes x 63. The device is man-
ufactured with ESI’s proprietary, high performance
and highly reliable 0.18um CMOS flash technology.
The device can be programmed or erased in-sys-
tem with standard 3.0 Volt Vcc supply ( 2.7V~3.6V)
and can also be programmed in standard EPROM
programmers. The device offers minimum endur-
ance of 100,000 program/erase cycles and more
than 10 years of data retention.
The ES29LV320 offers access time as fast as 70ns
or 90ns, allowing operation of high-speed micropro-
cessors without wait states. Three separate control
pins are provided to eliminate bus contention : chip
enable (CE#), write enable (WE#) and output
enable (OE#).
All program and erase operation are automatically
and internally performed and controlled by embed-
ded program/erase algorithms built in the device.
The device automatically generates and times the
necessary high-voltage pulses to be applied to the
cells, performs the verification, and counts the num-
ber of sequences. Some status bits (DQ7, DQ6 and
DQ5) read by data# polling or toggling between
consecutive read cycles provide to the users the
internal status of program/erase operation: whether
it is successfully done or still being progressed.
Extra Security Sector of 256 bytes
In the device, an extra security sector of 256 bytes is
provided to customers. This extra sector can be
used for various purposes such as storing ESN
(Electronic Serial Number) or customer’s security
codes. Once after the extra sector is written, it can
be permanently locked by the device manufacturer
(factory-locked) or a customer(customer-lockble).
At the same time, a
lock indicator bit
(DQ7) is per-
manently set to a 1 if the part is factory- locked, or
set to 0 if it is customer-lockable. Therefore, this lock
indicator bit (DQ7) can be properly used to avoid
that any customer-lockable part is used to replace a
factory-locked part. The extra security sector is an
extra memory space for customers when it is used
as a customer-lockable version. So, it can be read
and written like any other sectors. But it should be
noted that the number of E/W(Erase and Write)
cycles is limited to 300 times (maximum) only in the
Security Sector.
Special services such as ESN and factory-lock are
available to customers (ESI’s
Special-Code service
) The ES29LV320 is completely compatible with the
JEDEC standard command set of single power sup-
ply Flash. Commands are written to the internal
command register using standard write timings of
microprocessor and data can be read out from the
cell array in the device with the same way as used in
other EPROM or flash devices.
ES29LV320E
2
Rev. 0A May 25, 2006
E S I
I
ES
Excel Semiconductor inc.
PRODUCT SELECTOR GUIDE
Family Part Number
Voltage Range
Speed Option
Max Access Time (ns)
CE# Access (ns)
OE# Access (ns)
70
70
70
30
ES29LV320E
2.7V ~ 3.6 V
90
90
90
40
FUNCTION BLOCK DIAGRAM
RY/BY#
Vcc
Vss
Vcc Detector
Timer/
Counter
DQ0-DQ15(A-1)
Analog Bias
Generator
WE
#
RESET#
Command
Register
Write
State
Machine
Input/Output
Buffers
Sector Switches
Data Latch/
Sense Amps
Y-Decoder
A<0:20
>
Address Latch
Y-Decoder
CE#
OE#
BYTE#
X-Decoder
Cell Array
Chip Enable
Output Enable
Logic
ES29LV320E
3
Rev. 0A May 25, 2006
E S I
I
ES
Excel Semiconductor inc.
PIN DESCRIPTION
Pin
A0-A20
DQ0-DQ14
DQ15/A-1
CE#
OE#
WE#
WP#/ACC
RESET#
BYTE#
RY/BY#
Vcc
Vss
NC
21 Addresses
15 Data Inputs/Outputs
DQ15 (Data Input/Output, Word Mode)
A-1 (LSB Address Input, Byte Mode)
Chip Enable
Output Enable
Write Enable
Hardware Write Protect/Acceleration Pin
Hardware Reset Pin, Active Low
Selects 8-bit or 16-bit mode
Ready/Busy Output
3.0 volt-only single power supply
(see Product Selector Guide for speed options and voltage supply tolerances)
Device Ground
Pin Not Connected Internally
Description
LOGIC SYMBOL
21
A0 ~ A20
DQ0 ~ DQ15
(A-1)
CE#
OE#
WE#
WP#/ACC
RESET#
BYTE#
RY/BY#
16 or 8
ES29LV320E
4
Rev. 0A May 25, 2006
E S I
I
ES
Excel Semiconductor inc.
CONNECTION DIAGRAM
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
WE#
RESET#
NC
WP#/ACC
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48-Pin Standard TSOP
ES29LV320E
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
BYTE#
Vss
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
Vcc
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
Vss
CE#
A0
48-Ball FBGA 6 x 8 mm)
(Top View, Balls Facing Down)
C
D
E
F
G
H
J
K
7
A13
A12
A14
A15
A16
BYTE#
DQ15/
A-1
Vss
6
A9
A8
A10
A11
DQ7
DQ14
DQ13
DQ6
5
WE#
RESET#
NC
A19
DQ5
DQ12
Vcc
DQ4
4
RY/
BY#
WP#/
ACC
A18
A20
DQ2
DQ10
DQ11
DQ3
3
A7
A17
A6
A5
DQ0
DQ8
DQ9
DQ1
2
A3
A4
A2
A1
A0
CE#
OE#
Vss
ES29LV320E
5
Rev. 0A May 25, 2006
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