EN29F512
EN29F512
512 Kbit (64K x 8-bit) 5V Flash Memory
FEATURES
•
5.0V operation for read/write/erase
operations
•
Fast Read Access Time
- 45ns, 55ns, 70ns, and 90ns
•
-
-
-
-
Sector Architecture:
4 uniform sectors of 16Kbytes each
Supports full chip erase
Individual sector erase supported
Sector protection:
Hardware locking of sectors to prevent
program or erase operations within
individual sectors
High performance program/erase speed
Byte program time: 7µs typical
Sector erase time: 300ms typical
Chip erase time: 1.5s typical
•
JEDEC Standard program and erase
commands
•
JEDEC standard
DATA
polling and toggle
bits feature
•
Single Sector and Chip Erase
•
Sector Unprotect Mode
•
Embedded Erase and Program Algorithms
•
Erase Suspend / Resume modes:
Read and program another Sector during
Erase Suspend Mode
•
0.23 µm triple-metal double-poly
triple-well CMOS Flash Technology
•
Low Vcc write inhibit < 3.2V
•
100K endurance cycle
•
Package Options
- 32-pin PDIP
- 32-pin PLCC
- 32-pin 8mm x 20mm TSOP (Type 1)
- 32-pin 8mm x 14mm TSOP (Type 1)
•
Commercial and Industrial Temperature
Ranges
•
-
-
-
•
Low Standby Current
- 1µA CMOS standby current-typical
- 1mA TTL standby current
•
Low Power Active Current
- 12mA typical active read current
- 30mA program/erase current
GENERAL DESCRIPTION
The EN29F512 is a 512-Kbit, electrically erasable, read/write non-volatile flash memory. Organized
into 64K bytes with 8 bits per byte, the 512K of memory is arranged in four uniform sectors of
16Kbytes each. Any byte can be programmed typically in 7µs. The EN29F512 features 5.0V
voltage read and write operation, with access times as fast as 45ns to eliminate the need for WAIT
states in high-performance microprocessor systems.
The EN29F512 has separate Output Enable (
OE
), Chip Enable (
CE
), and Write Enable (
W E
)
controls, which eliminate bus contention issues. This device is designed to allow either single
Sector or full chip erase operation, where each Sector can be individually protected against
program/erase operations or temporarily unprotected to erase or program. The device can sustain a
minimum of 100K program/erase cycles on each Sector.
This Data Sheet may be revised by subsequent versions
1
or modifications due to changes in technical specifications.
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. A, Issue Date: 2003/10/20
EN29F512
TABLE 1. PIN DESCRIPTION
Pin Name
A0-A16
DQ0-DQ7
Function
Addresses
Data Inputs/Outputs
Chip Enable
Output Enable
Write Enable
Supply Voltage
(5V
±
10% )
Ground
Vss
A0 - A15
EN29F512
16
8
DQ0 - DQ7
FIGURE 1. LOGIC DIAGRAM
Vcc
CE
OE
WE
Vcc
Vss
CE
OE
WE
TABLE 2. SECTOR ARCHITECTURE
Sector
3
2
1
0
ADDRESSES
0C000h – 0FFFFh
08000h – 0BFFFh
04000h - 07FFFh
00000h - 03FFFh
SIZE (Kbytes)
16
16
16
16
A15
1
1
0
0
A14
1
0
1
0
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
2
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. A, Issue Date: 2003/10/20
EN29F512
BLOCK DIAGRAM
Vcc
Vss
Block Protect Switches
DQ0-DQ7
Erase Voltage Generator
State
Control
Program Voltage
Generator
Chip Enable
Output Enable
Logic
STB
Input/Output Buffers
WE
Command
Register
CE
OE
Data Latch
Y-Decoder
Address Latch
STB
Y-Gating
Vcc Detector
Timer
X-Decoder
Cell Matrix
A0-A15
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
3
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. A, Issue Date: 2003/10/20
EN29F512
FIGURE 2. PDIP
FIGURE 3. PLCC
FIGURE 4. TSOP
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
4
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. A, Issue Date: 2003/10/20
EN29F512
TABLE 3. OPERATING MODES
512K FLASH USER MODE TABLE
USER MODE
STANDBY
READ
OUTPUT DISABLE
READ
MANUFACTURE ID
READ DEVICE ID
VERIFY SECTOR
PROTECTION
SECTOR
PROTECTION
VERIFY SECTOR
UNPROTECTION
SECTOR
UNPROTECTION
WRITE
CE
H
L
L
L
L
L
L
L
L
L
WE
X
H
H
H
H
H
Pulse
L
H
Pulse
L
L
OE
X
L
H
L
L
L
VID
L
VID
H
A9
X
A9
X
VID
VID
VID
VID
VID
VID
A9
A8
X
A8
X
L/H
X
X
X
X
X
A8
A6
X
A6
X
L
L
L
L
H
H
A6
A1
X
A1
X
L
L
H
X
H
H
A1
A0
X
A0
X
L
H
L
X
L
L
A0
Ax/y
X
Ax/y
Ax/y
X
X
X
X
X
X
Ax/y
DQ(0-7)
HI-Z
DQ (0-7)
HI-Z
MANUFACTURE
ID
DEVICE ID
CODE
X
CODE
X
DIN (0-7)
NOTES:
1) L = V
IL
, H = V
IH
, V
ID
= 11.0V
±
0.5V
2) X = Don’t care, either V
IH
or V
IL
3) Ax/y: Ax = Addr(x), Ay = Addr(y)
TABLE 4. DEVICE IDENTIFICTION
512K FLASH MANUFACTURER/DEVICE ID TABLE
A8
READ
MANUFACTURER ID
READ
DEVICE ID
H
X
(1)
A6
L
L
A1
L
L
A0
L
H
(2)
DQ(7-0)
HEX
MANUFACTURER ID
1C
DEVICE ID
21
NOTES:
1) If a Manufacturing ID is read with A8 = L, the chip will output a configuration code 7Fh. A further
Manufacturing ID must be read with A8 = H.
2) X = Don’t care
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
5
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. A, Issue Date: 2003/10/20
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