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AFCT-5815CZ

产品描述Transceiver, 1261nm Min, 1360nm Max, 155Mbps(Tx), 155Mbps(Rx), SC Connector, Panel Mount, ROHS COMPLIANT PACKAGE
产品类别无线/射频/通信    光纤   
文件大小266KB,共10页
制造商富士康(FOXCONN)
官网地址http://www.fit-foxconn.com/
标准
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AFCT-5815CZ概述

Transceiver, 1261nm Min, 1360nm Max, 155Mbps(Tx), 155Mbps(Rx), SC Connector, Panel Mount, ROHS COMPLIANT PACKAGE

AFCT-5815CZ规格参数

参数名称属性值
是否Rohs认证符合
厂商名称富士康(FOXCONN)
Reach Compliance Codecompliant
ECCN代码5A991.B.5.A
主体宽度25.4 mm
主体高度9.8 mm
主体长度或直径39.6 mm
内置特性AMPLIFIER
通信标准ATM, OC-3, SDH, SONET, STM-1
连接类型SC CONNECTOR
数据速率(接收)155 Mbps
数据速率(发送)155 Mbps
发射极/检测器类型PIN PHOTODIODE
光纤设备类型TRANSCEIVER
光纤类型SMF
安装特点PANEL MOUNT
最高工作温度85 °C
最低工作温度-40 °C
最大工作波长1360 nm
最小工作波长1261 nm
标称工作波长1311 nm
标称光功率输出0.5623 mW
灵敏度-34 dBm
最大供电电压5.25 V
最小供电电压3.1 V
标称供电电压4.2 V
表面贴装NO

AFCT-5815CZ文档预览

AFCT-5815xZ
155 Mb/s Single Mode Fiber Optic Transceiver for ATM,
SONET OC-3/SDH STM-1
Data Sheet
Description
General
The AFCT‑5815xZ transceiver is a high performance, cost
effective module for serial optical data communications
applications specified for a data rate of 155 Mb/s. It is
designed to provide a SONET/SDH compliant link for long
reach links operating at +3.3 V or +5.0 V input voltage.
Features
RoHS compliant
Long reach SONET OC‑3 SDH STM1 (L1.1) compliant
Multisourced 1 x 9 pin configuration
Interchangeable with LED multisourced 1 x 9 trans‑
ceivers
Unconditionally eyesafe laser IEC 825/CDRH Class 1
compliant
Two Temperature Ranges:
0°C to +70°C AFCT‑5815BZ/DZ
‑40°C to +85°C AFCT‑5815AZ/CZ
Single +3.3 V or +5.0 V power supply operation
Wave solder and aqueous wash process compatible
Considerable EMI margin to FCC Class B
Transmitter Section
The transmitter section of the AFCT‑5815xZ consists of a
1300 nm InGaAsP laser in an eyesafe optical subassembly
(OSA) which mates to the fiber cable. The laser OSA is
driven by a custom IC which converts differential input
PECL logic signals, ECL referenced (shifted) to +3.3 V or
+5 V supply, into an analog laser drive current.
Applications
ATM 155 Mb/s links for LAN backbone switches and
routers
ATM 155 Mb/s links for WAN core, edge and access
switches and routers
ATM 155 Mb/s links for add/drop multiplexers and
demultiplexers
SONET OC‑3/SDH STM‑1 interconnections
Receiver Section
The receiver utilizes an InGaAs PIN photodiode mounted
together with a transimpedance preamplifier IC in an OSA.
This OSA is connected to a circuit providing post‑ amplifi‑
cation quantization, and optical signal detection.
ELECTRICAL SUBASSEMBLY
DATA
DATA
POST
AMPLIFIER IC
PRE-
AMPLIFIER
IC
OPTICAL
SUB-
ASSEMBLIES
LASER
DRIVER
IC
PIN PHOTODIODE
SIGNAL DETECT
DATA
DATA
DUPLEX SC
RECEPTACLE
LASER
TOP VIEW
Figure 1. Block Diagram
Receiver Signal Detect
Signal Detect is a basic fiber failure indicator. This is a
single‑ended PECL output. As the input optical power
is decreased, Signal Detect will switch from high to low
(deassert point) somewhere between sensitivity and
the no light input level. As the input optical power is
increased from very low levels, Signal Detect will switch
back from low to high (assert point). The assert level will be
at least 0.5 dB higher than the deassert level.
Applications Information
Typical BER Performance of Receiver versus Input Opti-
cal Power Level
The AFCT‑5815xZ transceiver can be operated at
Bit‑Error‑Rate conditions other than the required BER =
1 x 10
‑10
of the ATM Forum 155.52 Mb/s Physical Layer
Standard. The typical trade‑off of BER versus Relative In‑
put Optical Power is shown in Figure 2. The Relative Input
Optical Power in dB is referenced to the actual sensitivity
of the device. For BER conditions better than 1 x 10
‑10
,
more input signal is needed (+dB).
10
-2
10
-3
10
-4
10
-5
10
-6
10
-7
10
-8
10
-9
10
-10
10
-11
10
-12
10
-13
10
-14
10
-15
Transceiver Specified for Wide Temperature Range Op-
eration
The AFCT‑5815xZ is specified for operation over extended
temperature range of ‑40° to +85°C.
Characterization of the parts has been performed over
the ambient operating temperature range in an airflow
of 2 m/s.
LINEAR EXTRAPOLATION OF
10
-4
THROUGH 10
-7
DATA
BASED ON
ACTUAL DATA
Other Members of Avago Technologies SC Duplex
155 Mb/s Product Family
• HFCT‑5801, 1300 nm single mode transceiver for links
up to 15 km. The part is based on the 2 x 9 industry
standard package and has laser bias, optical power
monitor and transmitter disable functions.
BIT ERROR RATIO
-5 -4 -3 -2 -1 0 1 2
3
Figure 2. Relative Input Optical Power - dBm. Avg.
2
Recommended Circuit Schematic
In order to ensure proper functionality of the AFCT‑5815xZ
a recommended circuit is provided in Figure 3. When de‑
signing the circuit interface, there are a few fundamental
guidelines to follow. For example, in the Recommended
Circuit Schematic figure the differential data lines should
be treated as 50 ohm Microstrip or stripline transmission
lines. This will help to minimize the parasitic inductance
and capacitance effects. Proper termination of the dif‑
ferential data signals will prevent reflections and ringing
which would compromise the signal fidelity and gener‑
ate unwanted electrical noise. Locate termination at the
received signal end of the transmission line. The length
of these lines should be kept short and of equal length.
For the high speed signal lines, differential signals should
be used, not single‑ended signals, and these differential
signals need to be loaded symmetrically to prevent un‑
balanced currents from flowing which will cause distor‑
tion in the signal.
Maintain a solid, low inductance ground plane for re‑
turning signal currents to the power supply. Multilayer
plane printed circuit board is best for distribution of V
CC
,
returning ground currents, forming transmission lines
and shielding, Also, it is important to suppress noise
from influencing the fiber‑optic transceiver performance,
especially the receiver circuit. Proper power supply
filtering of V
CC
for this transceiver is accomplished by
using the recommended, separate filter circuits shown in
Figure 3 for the transmitter and receiver sections. These
filter circuits suppress V
CC
noise over a broad frequency
range, this prevents receiver sensitivity degradation due
to V
CC
noise. It is recommended that surface‑mount
components be used. Use tantalum capacitors for the
10 µF capacitors and monolithic, ceramic bypass capaci‑
tors for the 0.1 µF capacitors. Also, it is recommended
that a surface‑ mount coil inductor of 3.3 µH be used.
Ferrite beads can be used to replace the coil inductors
when using quieter V
CC
supplies, but a coil inductor
is recommended over a ferrite bead. All power supply
components need to be placed physically next to the
V
CC
pins of the receiver and transmitter. Use a good, uni‑
form ground plane with a minimum number of holes to
provide a low‑inductance ground current return for the
power supply currents.
In addition to these recommendations, Avago Tech‑
nologies Application Engineering staff is available for
consulting on best layout practices with various vendors
mux/demux, clock generator and clock recovery circuits.
Avago Technologies has participated in several reference
design studies and is prepared to share the findings of
these studies with interested customers. Contact your
local Avago Technologies sales representative to arrange
for this service.
NO INTERNAL
CONNECTION
TOP VIEW
Rx
V
EER
1
Rx
V
CCR
5
Tx
V
CCT
6
NO INTERNAL
CONNECTION
RD
2
RD
3
SD
4
TD
7
TD
8
Tx
V
EET
9
C1 C7
V
CC
TERMINATE
AT PHY
DEVICE
INPUTS
R6
R5
R7
C6
R8
R10
RD
RD
SD
L1
C3
C2 C8
V
CC
L2
C4
R1
R2
R3
C5
R4
NOTES:
THE SPLIT‑LOAD TERMINATIONS FOR PECL SIGNALS
NEED TO BE LOCATED AT THE INPUT OF DEVICES
RECEIVING THOSE PECL SIGNALS.
RECOMMEND 4‑LAYER PRINTED CIRCUIT BOARD
WITH 50Ω MICROSTRIP SIGNAL PATHS BE USED.
FOR +5.0V AND +3.3V OPERATION.
R1 = R4 = R6 = R8 = R10 = 130
R2 = R3 = R5 = R7 = R9 = 82
C1 = C2 = 10 µF
C3 = C4 = C7 = C8 = 100 nF
C5 = C6 = 0.1 µF
L1 = L2 = 3.3 µH COIL OR FERRITE INDUCTOR.
V
cc
FILTER
AT V
cc
PINS
TRANSCEIVER
R9
V
CC
TD
TERMINATION
AT
TRANSCEIVER
INPUTS
TD
Figure 3. Recommended Circuit Schematic
3
Evaluation Circuit Boards
Evaluation circuit boards are available from Avago Tech‑
nologies Application Engineering staff. Contact your
local Avago Technologies sales representative to arrange
for access to one if needed.
Recommended Solder Fluxes and Cleaning/Degreasing
Chemicals
Solder fluxes used with the AFCT‑5815xZ fiber‑optic
transceiver should be water‑soluble, organic solder flux‑
es. Some recommended solder fluxes are Lonco 3355‑11
from London Chemical West, Inc. of Burbank, CA, and 100
Flux from Alpha Metals of Jersey City, NJ.
Recommended cleaning and degreasing chemicals for
the AFCT‑5815xZ are alcohol’s (methyl, isopropyl, isobu‑
tyl), aliphatics (hexane, heptane) and other chemicals,
such as soap solution or naphtha. Do not use partially
halogenated hydrocarbons for cleaning/degreasing. Ex‑
amples of chemicals to avoid are 1.1.1. trichloroethane,
ketones (such as MEK), acetone, chloroform, ethyl ac‑
etate, methylene dichloride, phenol, methylene chloride
or N‑methylpyrrolidone.
Recommended Solder and Wash Process
The AFCT‑5815xZ is compatible with industry standard
wave or hand solder processes.
A drying cycle must be completed after wash process to
remove all moisture from the module.
AFCT-5815xZ Process Plug
The AFCT‑5815xZ transceiver is supplied with a process
plug for protection of the optical ports with the Duplex
SC connector receptacle. This process plug prevents con‑
tamination during wave solder and aqueous rinse as well
as during handling, shipping or storage. Each process
plug can only be used once during processing, although
with subsequent use, it can be used as a dust cover. It is
made of high‑temperature, molded, sealing material that
will withstand +85°C and a rinse pressure of 110 lb/in
2
.
20.32
(0.800)
2 x Ø 1.9 ± 0.1
(0.075 ± 0.004)
20.32
(0.800)
9 x Ø 0.8 ± 0.1
(0.032 ± 0.004)
2.54
(0.100)
TOP VIEW
DIMENSIONS ARE IN MILLIMETERS (INCHES)
Figure 4. Recommended Board Layout Hole Pattern
4
AVAGO
TX
XXXX-XXXX
ZZZZZ LASER PROD
21CFR(J) CLASS 1
COUNTRY OF ORIGIN YYWW
RX
KEY:
YYWW = DATE CODE
XXXX-XXXX = AFCT-5815
ZZZZ = 1300 nm
MAX
39.6
.
(1.56)
12.7
(0.50)
AREA
RESERVED
FOR
PROCESS
PLUG
25.4 MAX.
(1.00)
12.7 ± 0.3
(0.50 ± 0.012)
(
+0.1
0.25 -0.05
+0.004
0.010 -0.002
SLOT DEPTH 2.5
(0.10)
SLOT WIDTH
2.0 ± 0.1
(0.079 ± 0.004)
)
9.8
MAX.
(0.386)
0.51
(0.020)
20.32 ± 0.2
(0.800 ± 0.008)
15.8 ± 0.15
(0.622 ± 0.006)
3.3 ± 0.38
(0.130 ± 0.015)
+0.25
0.46 -0.05
+0.010
0.018 -0.002
9xØ
(
)
+0.25
1.27 -0.05
2xØ
+0.010
0.050 -0.002
(
)
23.8
(0.937)
20.32
(0.800)
8 x 2.54
(0.100)
20.32 ± 0.2
(0.800 ± 0.008)
2xØ
1.3
(0.051)
DIMENSIONS ARE IN MILLIMETERS (INCHES).
TOLERANCES: ±0.1 mm UNLESS OTHERWISE SPECIFIED.
Figure 5. Package Outline Drawing and Pinout
5
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