RTL8201
Preliminary
RTL8201
Single port 10/100Mbps Fast Ethernet Phyceiver
1. Features
Realtek’s RTL8201 is a Fast Ethernet Phyceiver with MII interface to MAC chip. It
provides the following features:
l
l
l
l
l
l
l
l
l
l
Support MII interface
Support 10/100Mbps operation
Support half/full duplex
operation
IEEE 802.3/802.3u compliant
Support IEEE 802.3u clause 28
auto negotiation
Support power down mode
Support Link Down Power
Saving mode operation.
Support repeater mode
Speed/duplex/auto negotiation
adjustable
3.3V operation with 5V signal
tolerance
Low operation power
consumption
Adaptive Equalization
25Mhz crystal/oscillator as
clock source
Many LEDs support to indicate
network status
Support 7-wire SNI (Serial
Network Interface) interface.
Flow control ability support to
co-work with MAC(by
MDC/MDIO)
48 pin LQFP package
l
l
l
l
l
l
l
Applications:
Network Interface Adapter, MAU, CNR, ACR, Ethernet Hub, Ethernet Switch, or any
embedded system with Ethernet MAC that need twist pair physical connection.
2. General Description
The RTL8201 is a single-port Phyceiver with MII(Media Independent Interface) that
implements all 10/100M Ethernet Physical-layer functions including the Physical
Coding Sublayer(PCS), Physical Medium Attachment(PMA), Twisted Pair Physical
Medium Dependent Sublayer(TP-PMD), 10Base-Tx Encoder/Decoder and Twisted
Pair Media Access Unit(TPMAU). And it is fabricated with an advanced CMOS
process to meet low voltage and low power requirement.
2000/9/25
1
Rev.1.0
RTL8201
Preliminary
3. Pin Assignment
28. RTSET
31. TPRX+
34. TPTX+
30. TPRX-
33. TPTX-
35. AGND
29. AGND
36. AVDD
32. AVDD
26. MDIO
27. RTT2
37. ANE
38. Duplex
39. Speed
40. RPTR/
RTT2
41. LDPS
42. RESETB
43. PWD
44. MII/
SNIB
45. AGND
46. X1
47. X2
48. PLLVDD
25. MDC
24. RXER
23. CRS
22. RXDV
21. RXD(0)
20. RXD1
19. RXD2
RTL8201
18. RXD3
17. DGND
16. RXC
15. LED4/
PAD4
14. DVDD
13. LED3/
PAD3
10. LED1/
PAD1
2. TXE(N)
11. DGND
2000/9/25
12. LED2/
PAD2
6. TXD(0)
9. LED0/
PAD0
8. DVDD
3. TXD3
4. TXD2
5. TXD1
1. COL
7. TXC
2
Rev.1.0
RTL8201
Preliminary
4. Pin Descriptions
4.1 100 Mbps MII & PCS Interface
Symbol
TXC
Type
O
Pin(s) No.
7
Description
Transmit Clock: This pin provides a
continuous clock as a timing reference for
TXD[3:0] and TXEN.
Transmit Enable: The input signal indicates
the presence of a valid nibble data on
TXD[3:0].
Transmit Data: MAC will source TXD[0..3]
synchronous with TXC when TXEN is
asserted.
Receive Clock: This pin provides a
continuous clock reference for RXDV and
RXD[0..3] signals. RXC is 25MHz in the
100Mbps mode and 2.5Mhz in the 10Mbps
mode.
Collision Detected: COL is asserted high
when a collision is detected on the media.
Carrier Sense: This pin’s signal is asserted
high if the media is not in IDEL state.
Receive Data Valid: This pin’s signal is
asserted high when received data is present
on the RXD[3:0] lines; the signal is
deasserted at the end of the packet. The
signal is valid on the rising of the RXC.
Receive Data: These are the four parallel
receive data lines aligned on the nibble
boundaries driven synchronously to the RXC
for reception by the external physical unit
(PHY).
Receive error: if any 5B decode error
occurred such as invalid J/K, T/R, invalid
symbol, this pin will go high
Management Data Clock: This pin provides a
clock synchronous to MDIO, which may be
asynchronous to the transmit TXC and
receive RXC clocks.
Management Data Input/Output: This pin
provides the bi-directional signal used to
transfer management information.
TXEN
I
2
TXD[3:0]
I
3, 4, 5, 6
RXC
O
16
COL
CRS
RXDV
O
I/O
O
1
23
22
RXD[3:0]
O
18, 19, 20, 21
RXER
O
24
MDC
I
25
MDIO
I/O
26
2000/9/25
3
Rev.1.0
RTL8201
Preliminary
4.2 SNI (Serial Network Interface): 10Mbps only
Symbol
COL
RXD
CRS
RXC
TXD
TXC
TXE
Type
O
O
O
O
I
O
I
Pin(s) No.
1
21
23
16
6
7
2
Description
Collision Detect
Received Serial Data
Carry Sense
Receive Clock: resolved from received data
Transmit Serial Data
Transmit Clock: generate by PHY
Transmit Enable: for MAC to indicate
transmit operation
4.3 Clock Interface
Symbol
X2
X1
Type
O
I
Pin(s) No.
47
46
Description
25Mhz Crystal Output: This pin provides the
25MHz crystal output.
25Mhz Crystal Input: This pin provides the
25MHz crystal input.
4.4 100Mbps Network Interface
Symbol
TPTX+
TPTX-
RTSET
TPRX+
TPRX-
Type
O
O
I
I
I
Pin(s) No.
34
33
28
31
30
Description
Transmit Output
Transmit bias resistor connection, should pull
to GND by a 1.69K resistor.
Receive input
4.5 Device Configuration Interface
Symbol
PWD
RPTR/RT
T2
SPEED
DUPLEX
ANE
LDPS
Type
I
I
I
I
I
I
Pin(s) No.
43
40
39
38
37
41
Description
Set high to put RTL8201 into
Power Down
mode
Set high to put RTL8201 into repeater mode.
In test mode, this pin is re-defined as RTT2.
Set high to put RTL8201 into force 10Mbps
operation
Set high to enable full duplex
Set high to enable Autonegotiate mode, set
low to force mode
Set high to put RTL8201 into LDPS mode,
2000/9/25
4
Rev.1.0
RTL8201
Preliminary
MII/SNIB/
TXD5(test
)
I
44
Pull high to set RTL8201 into MII mode
operation
4.6 LED Interface/PHY Address Config
Symbol
LED0/
PAD0
LED1/
PAD1
LED2/
PAD2
LED3/
PAD3
LED4/
PAD4
Type
O
O
O
O
O
Pin(s) No.
9
10
12
13
15
Description
Link LED
Full Duplex LED
Link 100/ACT LED
Link 10/ACT LED
Collision LED
4.7 Reset and Test pin
Symbol
RTT2
RESETB
Type
I
I
Pin(s) No.
27
42
Description
Test pin
RESETB: Setting low to reset the chip.
4.8 Power and Ground pin
Symbol
PLLVDD
Type
P
Pin(s) No.
48
Description
3.3V power supply for PLL, should be well
decoupled and use a bead with 100ohm @
100Mhz to connect to analog power
3.3V power supply for analog circuit, should
be well decoupled
Analog Ground, should be connected to a
larger GND plane
Digital Power, 3.3V power supply for digital
circuit.
Digital Ground, should be connected to a
larger GND plane
AVDD
AGND
DVDD
DGND
P
P
P
P
32,36
29,35,45
8,14
11,17
2000/9/25
5
Rev.1.0
聊聊、笑笑、闹闹
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
