ESDA6V1L
Transient voltage suppressors
Description
The ESDA6V1L is a dual monolithic voltage suppressor designed to
protect components which are connected to data and transmission
lines against ESD.
It clamps the voltage just above the logic level supply for positive
transients, and to a diode drop below ground for negative transients.
It can also work as bidirectional suppressor by connecting only pin1
and pin2.
Features
1.
2.
3.
4.
Dual transil array for ESD protection
2 unidirectional transil functions
Low leakage current: I
Rmax
<20 µA at V
BR
300W peak pulse power (8/20 µs)
SOT-23
Applications
Where transient overvoltage protection in ESD sensitive equipment
is required, such as: Computers, Communication systems…
Functional diagram
Absolute Maximum Ratings
T
a
=25℃
Parameter
Electrostatic discharge
Test Conditions
MIL STD 883C-Method 3015-6
IEC61000-4-2 air discharge
IEC61000-4-2 contact discharge
Peak pulse power
Junction temperature
Storage temperature range
Maximum lead temperature
Operating temperature range
For soldering during 10s
8/20µs
P
PP
T
j
T
stg
T
L
T
op
V
PP
Symbol
Value
25
16
9
300
150
-55~+150
260
-40~+125
W
℃
℃
℃
℃
KV
Unit
Stresses exceeding maximum ratings may damage the device. Maximum ratings are stress ratings only. Functional operation above the
recommended operating conditions is not implied. Extended exposure to stresses above the recommended operating conditions may
affect device reliability.
Excel Semiconductor
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Rev. 3f, 1-Dec-2007
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ESDA6V1L
Electrical Characteristics
T
a
=25℃
Symbol
V
RM
V
BR
V
CL
I
RM
I
PP
αT
C
R
d
V
F
Parameter
Stand-off voltage
Breakdown voltage
Clamping voltage
Leakage current
Peak pulse current
Voltage temperature coefficient
Capacitance
Dynamic resistance
Forward voltage drop
Parameter
Breakdown voltage
Leakage current
Capacitance
Forward voltage drop
Test Conditions
I
R
=1.0mA
V
RM
=5.25V
0V bias
I
F
=200mA
Symbol
V
BR
I
RM
C
V
F
Min
6.1
-
-
-
Typ
6.65
-
140
-
Max
7.2
20
-
1.25
Unit
V
µA
pF
V
Characteristics
(T
j
=25℃ unless otherwise specified)
P
PP
(T
j
initial) / P
PP
(T
j
initial=25
℃
)
T
j
initial (
℃
)
P
PP
(W)
tp (µs)
Fig.1: Peak power dissipation vs. initial junction temperature
Fig.2: Peak pulse power vs. exponential pulse duration
(T
j
initial = 25
℃
)
Excel Semiconductor
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Rev. 3f, 1-Dec-2007
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ESDA6V1L
I
PP
(A)
V
CL
(V)
C (pF)
V
R
(V)
Fig.3: Clamping voltage vs. peak pulse current
(Tj initial = 25
℃
, rectangular waveform tp = 2.5µs)
Fig.4: Capacitance vs. reverse applied voltage
(typical values)
I
R
(T
j
) / I
R
(T
j
=25℃)
I
FM
(A)
T
j
(℃)
V
FM
(V)
Fig.5: Relative variation of leakage current vs. junction
Temperature (typical values)
Fig.6: Peak forward voltage drop vs. peak forward
Current (typical values)
Excel Semiconductor
www.excel-semi.com
FaxBack +86-512-66607370
Rev. 3f, 1-Dec-2007
3/4
ESDA6V1L
Dimensions
PIN 1. Cathode
2. Cathode
3. Anode
Notes:
1. Dimensioning and tolerance per
ANSI Y14.5M, 1982.
2. Controlling dimension: inch.
3. Maximum lead thickness includes lead finish
thickness. Minimum lead thickness is the
minimum thickness of base material.
Marking
EL61
SOT-23 Footprint
Excel Semiconductor
www.excel-semi.com
FaxBack +86-512-66607370
Rev. 3f, 1-Dec-2007
4/4