PE43712
Product Specification
UltraCMOS® RF Digital Step Attenuator, 9 kHz–6 GHz
Features
• Flexible attenuation steps of 0.25 dB, 0.5 dB and
1 dB up to 31.75 dB
• Glitch-less attenuation state transitions
• Monotonicity: 0.25 dB up to 4 GHz, 0.5 dB up to
5 GHz and 1 dB up to 6 GHz
• Extended +105 °C operating temperature
• Parallel and Serial programming interfaces with
Serial Addressability
• Packaging—32-lead 5 × 5 mm QFN
Figure 1 •
PE43712 Functional Diagram
Switched Attenuator Array
RF
Input
RF
Output
Applications
• 3G/4G wireless infrastructure
• Land mobile radio (LMR) system
• Point-to-point communication system
Parallel
Control
×7
Serial In
CLK
Control Logic Interface
LE
A0
A1
A2
P/S
Product Description
The PE43712 is a 50Ω, HaRP™ technology-enhanced,7-bit RF digital step attenuator (DSA) that supports a
broad frequency range from 9 kHz to 6 GHz. It features glitch-less attenuation state transitions and supports
1.8V control voltage and an extended operating temperature range to +105 °C, making this device ideal for
many broadband wireless applications.
The PE43712 is a pin-compatible upgraded version of the PE43601 and PE43701. An integrated digital control
interface supports both Serial Addressable and Parallel programming of the attenuation, including the capability
to program an initial attenuation state at power-up.
The PE43712 covers a 31.75 dB attenuation range in 0.25 dB, 0.5 dB and 1 dB steps. It is capable of
maintaining 0.25 dB monotonicity through 4GHz, 0.5 dB monotonicity through 5 GHz and 1 dB monotonicity
through 6 GHz. In addition, no external blocking capacitors are required if 0 VDC is present on the RF ports.
The PE43712 is manufactured on Peregrine’s UltraCMOS
®
process, a patented variation of silicon-on-insulator
(SOI) technology on a sapphire substrate.
©2015, Peregrine Semiconductor Corporation. All rights reserved. • Headquarters: 9380 Carroll Park Drive, San Diego, CA, 92121
Product Specification
www.psemi.com
DOC-49514-1 – (3/2015)
PE43712
UltraCMOS® RF Digital Step Attenuator
Peregrine’s HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an
innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and
integration of conventional CMOS.
Absolute Maximum Ratings
Exceeding absolute maximum ratings listed in
Table 1
may cause permanent damage. Operation should be
restricted to the limits in
Table 2.
Operation between operating range maximum and absolute maximum for
extended periods may reduce reliability.
ESD Precautions
When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices.
Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to
avoid exceeding the rating specified in
Table 1.
Latch-up Immunity
Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up.
Table 1 •
Absolute Maximum Ratings for PE43712
Parameter/Condition
Supply voltage, V
DD
Digital input voltage
RF input power, 50Ω
9 kHz–48 MHz
>48 MHz–6 GHz
Storage temperature range
ESD voltage HBM, all pins
(1)
ESD voltage CDM, all pins
(2)
Notes:
1) Human body model (MIL–STD 883 Method 3015).
2) Charged device model (JEDEC JESD22–C101).
Min
–0.3
–0.3
Max
5.5
3.6
Unit
V
V
Figure 5
+31
–65
+150
3000
1000
dBm
dBm
°C
V
V
Page 2
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DOC-49514-1 – (3/2015)
PE43712
UltraCMOS® RF Digital Step Attenuator
Recommended Operating Conditions
Table 2
lists the recommending operating condition for the PE43712. Devices should not be operated outside
the recommended operating conditions listed below.
Table 2 •
Recommended Operating Condition for PE43712
Parameter
Supply voltage, V
DD
Supply current, I
DD
Digital input high
Digital input low
Digital input current
RF input power, CW
(1)
9 kHz–48 MHz
>48 MHz–6 GHz
RF input power, pulsed
(2)
9 kHz–48 MHz
>48 MHz–6 GHz
Operating temperature range
Notes:
1) 100% duty cycle, all bands, 50Ω.
2) Pulsed, 5% duty cycle of 4620 µs period, 50Ω.
Min
2.3
Typ
Max
5.5
Unit
V
µA
V
V
µA
150
1.17
–0.3
200
3.6
0.6
17.5
Figure 5
+23
dBm
dBm
Figure 5
+28
–40
+25
+105
dBm
dBm
°C
DOC-49514-1 – (3/2015)
www.psemi.com
Page 3
PE43712
UltraCMOS® RF Digital Step Attenuator
Electrical Specifications
Table 3
provides the PE43712 key electrical specifications at 25 °C, V
DD
= 3.3V, RF1 = RF
IN
, RF2 = RF
OUT
(Z
S
=
Z
L
= 50Ω), unless otherwise specified.
Table 3 •
PE43712 Electrical Specifications
Parameter
Operating frequency
0.25 dB step
0.5 dB step
1 dB step
9 kHz–1.0 GHz
1.0–2.2 GHz
2.2–4.0 GHz
4.0–6.0 GHz
Condition
Frequency
Min
9 kHz
Typ
Max
6 GHz
Unit
As
shown
dB
dB
dB
Attenuation range
0–31.75
0–31.50
0–31.00
1.3
1.6
1.95
2.45
1.5
1.85
2.4
2.8
Insertion loss
dB
dB
dB
dB
0.25 dB step
0–8 dB
8.25–31.75 dB
0–31.75 dB
0–31.75 dB
Attenuation error
9 kHz–2.2 GHz
9 kHz–2.2 GHz
>2.2–3.0 GHz
>3.0–4.0 GHz
± (0.20 + 1.5% of
attenuation setting)
± (0.20 + 2.0% of
attenuation setting)
± (0.15 + 3.0% of
attenuation setting)
± (0.25 + 3.5% of
attenuation setting)
dB
dB
dB
dB
0.50 dB step
0–8 dB
8.5–31.5 dB
0–31.5 dB
0–31.5 dB
9 kHz–2.2 GHz
9 kHz–2.2 GHz
>2.2–3.0 GHz
>3.0–5.0 GHz
± (0.20 + 1.5% of
attenuation setting)
± (0.20 + 2.0% of
attenuation setting)
± (0.15 + 3.0% of
attenuation setting)
± (0.25 + 5.0% of
attenuation setting)
dB
dB
dB
dB
Page 4
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DOC-49514-1 – (3/2015)
PE43712
UltraCMOS® RF Digital Step Attenuator
Table 3 •
PE43712 Electrical Specifications (Cont.)
Parameter
1 dB step
0–8 dB
9–31 dB
Attenuation error
0–31 dB
0–31 dB
0–31 dB
>2.2–3.0 GHz
>3.0–5.0 GHz
>5.0–6.0 GHz
9 kHz–4 GHz
4–6 GHz
9 kHz–4 GHz
4–6 GHz
48 MHz–6 GHz
Two tones at +18 dBm, 20 MHz
spacing
10%/90% RF
RF settled to within 0.05 dB of final
value
50% CTRL to 90% or 10% RF
2 GHz
4 GHz
6 GHz
13
15
27
42
31
57
56
200
1.6
275
0.3
9 kHz–2.2 GHz
9 kHz–2.2 GHz
± (0.20 + 1.5% of
attenuation setting)
± (0.20 + 2.0% of
attenuation setting)
± (0.15 + 3.0% of
attenuation setting)
± (0.25 + 5.0% of
attenuation setting)
± (0.25 + 5.0% of
attenuation setting)
dB
dB
dB
dB
dB
dB
dB
deg
deg
dBm
dBm
dBm
ns
µs
ns
dB
Condition
Frequency
Min
Typ
Max
Unit
Return loss
Input port or output port
Relative phase
Input 0.1dB compression
point
(*)
Input IP3
RF T
rise
/T
fall
Settling time
Switching time
Attenuation transient
(envelope)
All states
Note: *
The input 0.1dB compression point is a linearity figure of merit. Refer to
Table 2
for the operating RF input power (50Ω).
DOC-49514-1 – (3/2015)
www.psemi.com
Page 5
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