SC23M42
256-BYTE MEMORY CARD IC
DESCRIPTION
SC23M42 is a smart card module utilizing CMOS EEPROM
technology. 256 bytes main memory, 32-bit protection memory, 3
bytes user password, and 3-bit password wrong counter (Value:
00000D2D1D0). And the periphery interface is compatible with
ISO7816 agreement (synchronous propagation).
FEATURES
* 256 X 8 bit EEPROM
* Byte addressing
* Write-protect area (former 32 bytes) can execute the write-protect
separately, and after the write-protect, the content cannot be
changed.
* 32 X 1bit protect memory
* Serial two buses interface
* More than 100,000 times write endurance cycles
* Data retention of more than 10 years
* Contact definition and serial interface comply to ISO7816
specification (synchronous propagation)
* 3 Bytes user password, 3 bits(bit0-bit2) error counter
* Before the password is checked, all the data can be read; if the
password is correct, you can write or amend the data and the
password.
* Password error counter, and the initial value is 3. Checking the
password once, subtracts 1, if the value of the counter is 0, the
memory card will be locked automatically, and the data can only
be read, the password cannot be checked again; When the value
of the counter is not 0, if the password checking is correct for one
time, the value comes back to initial value.
* Comply to SLE4442
* used for various IC memory cards.
ORDERING INFORMATION
Device
SC23M42A
SC23M42B
Package
P6-05
MCTS012402
APPLICATIONS
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
REV:1.0
2006.07.21
Page 1 of 11
SC23M42
BLOCK DIAGRAM
EEPROM
High voltage generator
Reference current generator
Address
decoder
Address and data
register,
comparator
Program
control
Timing and encipher logic
Power on reset detector
Interface
VCC
GND
I/O
RST
CLK
ABSOLUTE MAXIMUM RATINGS
Characteristics
Power Supply Voltage
Input Voltage
Storage Temperature
Power Dissipation
Symbol
V
CC
V
I
T
stg
P
D
Ratings
-0.3~6
-0.3~6
-40~125
70
Unit
V
V
°C
mW
DC ELECTRICAL CHARACTERISTICS
(V
CC
=5V, T
amb
=25°C)
Characteristics
Power Supply Voltage
Operating Current
H Input Voltage(I/O, CLK, RST)
L Input Voltage(I/O, CLK, RST)
H Input Current(I/O, CLK, RST)
L Output Current(V
L
=0.4V,Open-drain)
H Leakage Current(V
H
=V
CC
, Open-
drain)
Input Capacitance
Operating Frequency
Symbol
V
CC
I
CC
V
IH
V
I
I
H
I
OL
I
OH
C
I
F
OSC
Condition
Min.
2.4
--
3.0
0
--
0.5
--
--
7
Typ.
--
3
--
--
3
1.0
--
--
20
Max.
5.5
10
V
CC
1.2
5
--
1
10
50
Unit
V
mA
V
V
µA
mA
µA
pF
kHz
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
REV:1.0
2006.07.21
Page 2 of 11
SC23M42
AC ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, V
CC
=5.0V, T
amb
=25°C, and testing frequency is 20 kHz)
Characteristics
Reset Time
CLK (High Level)
CLK (Low Level)
Write Time
Erase Time
Set-up Time(D/CLK)
Set-up Time (CLK/RST)
Set-up Time (RST/CLK)
Hold Time (D/CLK)
Delay Time (CLK/D)
Rise Time (I/O, CLK, RST)
Fall Time (I/O, CLK, RST)
Symbol
t
RE
t
H
t
L
t
W
t
E
t
d1
t
d3
t
d4
t
d5
t
d2
t
R
t
F
Condition
Min.
9
10
10
5
5
4
4
4
4
6
--
--
Typ.
--
--
--
--
--
--
--
--
--
--
--
--
Max.
--
--
--
--
--
--
--
--
--
--
1
1
Unit
µs
µs
µs
ms
ms
µs
µs
µs
µs
µs
µs
µs
PIN CONFIGURATION
V
CC
1
RST 2
CLK 3
NC 4
(Contact of the card)
8 GND
7 NC
6 I/O
5 NC
PIN DESCRIPTIONS
Pin No.
1
2
3
4
5
6
7
8
Symbol
V
CC
RST
CLK
NC
GND
NC
I/O
NC
I/O
--
I
I
--
--
--
I/O
--
Power supply voltage is 5V
Reset signal
Clock signal
No connect
Ground
No connect
Data bus(open-drain output)
No connect
Description
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
REV:1.0
2006.07.21
Page 3 of 11
SC23M42
FUNCTION DESCRIPTIONS
SC23M42 provides 256×8 bits EEPROM memory units and 32×1 protect units, and there is writing-protect for
the former 32-bit bytes. Except PSC (Programmable Security Code) memory unit, all units are readable. The unit
can be erased and written before the write-protect is active, or else the unit is only readable after the write-protect.
The bit with write-protection can be programmed only once, and cannot be erased. The chip has one 3-bit (bit0-
bit2)error register which provides 3 times continuous PSC authentication at most, after 3 times the chip cannot be
erased and written.
Transmission Protocols
Transmit the data by serial two buses between IFD and IC memory cards.
The transmission protocols can be defined as four operation mathods
-Reset and reset acknowledge
-Command
-Output the data
-Process
1. Reset and reset acknowledge
The chips enter the power on reset state when it is power on, and this state will be ended by the reset signal.
The reset signal begins when RST changed from“ to “ and end when CLK changed from “ to“ . The reset
0” 1”
0” 1”
signal can stop any active instruction. Read operation must be carried out first after power on reset, then the
other operations.
The reset acknowledge complies to ISO7816-3 synchronous propagation. The address counter is set to “
0”
automatically and will send the first data to the I/O port. As the clock signal, the address data can be read serially.
And the content of the former 4 EEPROM address units can be read after the continuous 32 clock pulses, and
then the 33
rd
clock pulse will set I/O to H state. The details refer to the figure 1.
Figure 1 Reset and reset acknowledge
Reset acknowledge
(Hex)
Byte 1
DO
7
… DO
0
Byte2
DO
15
… DO
8
Byte3
DO
23
… DO
16
Byte4
DO
31
… DO
24
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
REV:1.0
2006.07.21
Page 4 of 11
SC23M42
2. Instruction format
Instruction table
Byte1control
B7B6B5B4
0011
0011
0011
0011
0011
0011
0011
B3B2B1B0
0000
1000
0100
1100
0001
1001
0011
Byte2 Address
A7-A0
Address bit
Address bit
invalid
Address bit
invalid
Address bit
Address bit
Byte3 Data
D7-D0
invalid
Input data
invalid
Input data
invalid
Input data
Input data
Operation
Read the main memory
Write the main memory
Read protect memory
Write protect memory
Read password memory
Amend password memory
Compare
data
Figure 2 Command input time sequence
Command
IFD Sets I/O to level L
Method
Output data
Process
Output data
Process
Output data
Process
Process
authentication
CLK
0
1
2
7
8
9
10
15
16
17
18
23
24
I/O
B0
B1
B6
B7
A0
A1
A6
A7
D0
D1
D6
D7
Start
from IFD
Stop
from IFD
3. Instruction description
1) Read main memory
Control
B7
Binary
Hex
0
B6
0
B5
1
B4
1
30H
B3
0
B2
0
B1
0
B0
0
Address
A7… A0
Address
00H… FFH
Data
D7… D0
No effect
No effect
This command will read the data from current byte address N to the last address and the needed pulse number
m=(256-N) ×8+1
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
REV:1.0
2006.07.21
Page 5 of 11
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