S
ilicore
RADIO CONTROLLED RECEIVER IC
DESCRIPTION
The D6002 is a bipolar integrated straight
through receiver circuit in the frequency range
fro m 40kHz up to 200kHz with ASK modulation.
The IC receivers and demodulates time code
signals transmitted by DCF77,MSF , WWVB
and G2AS.
Th e devices is designed for radio controlled
clock applications with very high sensitivity.
Integrated functions as stand by mode and
co mple mentary output stages offer features for
universal applications.
The BIP2 technology makes all the above features possible for very low cost
applications.
D6002
Outline Drawing
FEATURE
Single chip straight through receiver.
Low power battery applications(1.1~3.6V)
Very low power consumption.
Power down modus.
Wide frequency range (40~200kHz)
Very high sensitivity.
High selectivity by quartz resonato r.
Co mp le mentary output stages.
Minimu m external components.
APPLICATIONS
Receiver for ti me code transmitter signal’s
Receiver for ASK mod ulated date signal’s.
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CHMC
Silicore
BLOCK DIAGRAM
CD1 CD2
O1
O2
IC
CD3
CDEM VDD
D6002
IA1
+
IA2
OD1
OD2
RF Amp
(RF Amp)
(Post Amp)
GND1
Post Amp
-
Vc c
Bias
Comparator
Gain
Peak
Control Detector
CAGC
STOP
PON
GND3 GND2
PIN DEFINITION
Pin
1
2
3
4
5
6
7
8
9
10
PON
Symbol
GND2
CD1
CD2
IA1
Vcc
IA2
V
DD
OD1
OD2
GND1
Description
Ground 2 (RF stages).
Decoupling capacitor C1
Decoupling capacitor C1
Antenna input 1
Supply voltage
Antenna input 2
Supply voltage for
co mparator and output stage
Data output 1 (pull down)
Data output 2 (pull up)
Ground 1(output stages)
Pin
11
12
13
14
15
16
17
18
19
20
Symbol
PON
STOP
CAGC
CDEM
GND3
NC
CD3
IC
O2
O1
Description
Power on
AGC stop
AGC capacitor
Demodulation capacitor
Ground 3(Post amplifier)
Not connected
Decoupling capacitor C2
Crystal input
Non-inverting RF ou tput
Inverting RF output
Power on/off control
If PON is connected to GND/Vcc the D6002 receiver is active/stand-by.
OD1
Data output 1
The output signal can directly decoded by a microprocessor.
The output OD1 is a PNP open collector stage with high active logic. Th e
connection with an external resistor of 100kΩ to GND is possible.
OD2
Data output 2
The ou tput OD2 is a NPN open collector stage with low active logic. The connection
with an external resistor of 100kΩ to Vcc is possible.
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CHMC
Silicore
GND1
Gr ound 1
D6002
GND1 is the control ground potential for the comp lete ci rcuit. GND1 have to
connected to GND2/GND3.
GND2
Gr ound 2
The Pin GND2 is the ground potential for the RF amplifier and has to connected to
GND1.
GND3
Gr ound 3
The Pin GND3 is the ground potential for the Post amplifier and has to connected
to GND1.
STOP
AGC stop
If STOP is connected to GND/Vcc t he AGC circuit is off/on
CAGC
AGC capacitor
The Pin CAGC is connected to an external capacitor against GND. It is necessary
to generate the peak value of the de modulator output voltage signal. Th e peak value
controls the AGC.
CDEM
Demodulation capacitor
The Pin CDEM is connected to an external capacitor against GND. It is necessary
for the de modulation of the AM signal.
CD3
Decoupling capacitor C2
The Pin CD3 is connected to an external capacitor against GND. It is necessary for
the stab ility of the post a mplifier. The values of the external capacitor influence the
frequency response of the post amplifier.
ABSOLUTE MAXIMUM RATINGS
(Ta=25
°C)
Characteristic
Supply Vo ltage Vcc
Supply Vo ltage V
D D
Output Vo ltage OD1
Output Vo ltage OD2
Switch Vo ltage STOP
Switch Vo ltage PON
Junction Temp erature
Storage Temp erature Range
Electrostatic hand ling (MIL standard 863C)
Symbol
Vcc
V
DD
V
OD1
V
OD2
V
STOP
V
PON
Tj
Tstg
ESD
Min
0
0
-0.3
-0.3
-0.3
-0.3
-55
-55
-2000
Max
5.5
5.5
V
D D
+0.3
V
D D
+0.3
V
D D
+0.3
V
D D
+0.3
150
150
+2000
Unit
V
V
V
V
V
V
°C
°C
V
3/6
SHAOXING SILICORE TECHNOLOGY CO.,LTD
www. Silicore. com. cn
CHMC
Silicore
ELECTRICAL CHARACTERISTICS
D6002
(They apply within the specified operating conditions unless otherwise specified.)
Characteristics
Output pulse Duration(OD1,OD2)
Input Vo ltage(IC)
Input Resistance(IA1,IA2)
Input Resistance(IC)
Input Resistance Demodulator
RF-gain
RF gain
Output Vo ltage Demo d ulator
Symbol
t
WODk
V
IN
IC
Test conditions
Min
170
30
Typ
195
600
400
50
Max
230
300
Unit
ms
µVr
ms
k
Ω
k
Ω
k
Ω
dB
dB
Vp-p
R
IN
R
IN
R
IN
G
RF
G
RF
V
OUT
max
min
DEM
V
C A G C
=0V
V
C A G C
=Vcc
56
-40
0.25
TEST CIRCUIT
VDD
C1
CD2 O1
CD3
22nF
6.8nF
CD1
Tr
1M
IA2
IA1
O2
Q1
IC
C2
47nF
C3
VDD
100K
100K
4/6
CDEM
+
RF Amp
Post Amp
OD1
-
OD2
Vc c
Vc c
PON
Bias
Comparator
(RF Amp) Gain
Peak
(Post Amp)
Control Detector
GND1
GND3 GND2
CAGC
4.7uF
C4
STOP
SHAOXING SILICORE TECHNOLOGY CO.,LTD
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CHMC
Silicore
TYPICAL APPLICATION CIRCUIT
O1
O2
VDD
100k
IC
CD1
6.8nF
1.8nF~6.8nF
Antenna L1
IA1
f
R EG
=77.5kHz
220nF
IA2
VDD
470
4.7uF
Vc c
GND1
GND2
GND3
CD3
47nF
CDEM
22nF
CAGC
4.7uF
CD2
STOP
PON
OD2
OD1
D6002
77.5kHz
D
6
0
0
2
µc
VDD=3V
4.7uF
APPLICATION CIRCUIT for WWVB 60kHz
O1
60kHz
O2
VDD
100k
IC
CD1
6.8nF
1.8nF~6.8nF
470
CD2
IA1
IA2
VDD
470
4.7uF
Vc c
GND1
GND2
GND3
CD3
47nF
CDEM
22nF
CAGC
4.7uF
STOP
PON
OD2
OD1
Antenna L1
f
R EG
=60kHz
D
6
0
0
2
µc
220nF
VDD=3V
4.7uF
470
SHAOXING SILICORE TECHNOLOGY CO.,LTD
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CHMC
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