SPC251A2
SP
256KB Sound Controller
SEP. 11, 2001
Version 1.2
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are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may
reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus.
SPC251A2
Table of Contents
PAGE
1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3
2. BLOCK DIAGRAM ...................................................................................................................................................................................... 3
3. FEATURES.................................................................................................................................................................................................. 3
4. APPLICATION FIELD ................................................................................................................................................................................. 3
5. SIGNAL DESCRIPTIONS* .......................................................................................................................................................................... 4
6. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 5
6.1. CPU ..................................................................................................................................................................................................... 5
6.2. O
SCILLATOR
.......................................................................................................................................................................................... 5
6.3. M
ASK
O
PTION
....................................................................................................................................................................................... 5
6.4. ROM A
REA
........................................................................................................................................................................................... 5
6.5. RAM A
REA
............................................................................................................................................................................................ 5
6.6. V
OLUME
C
ONTROL
F
UNCTION
................................................................................................................................................................ 5
6.7. M
AP OF
M
EMORY AND
I/O
S
.................................................................................................................................................................... 5
6.8. I/O P
ORT
C
ONFIGURATIONS
*.................................................................................................................................................................. 5
6.9. T
IMER
/C
OUNTER
................................................................................................................................................................................... 6
6.10. S
PEECH AND
M
ELODY
......................................................................................................................................................................... 6
6.11. P
OWER
S
AVINGS
M
ODE
...................................................................................................................................................................... 7
6.12. L
OW
V
OLTAGE
R
ESET
......................................................................................................................................................................... 7
7. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 8
7.1. A
BSOLUTE
M
AXIMUM
R
ATINGS
............................................................................................................................................................... 8
7.2. AC C
HARACTERISTICS
(T
A
= 25℃) ........................................................................................................................................................ 8
7.3. DC C
HARACTERISTICS
(VDD = 3.0V, T
A
= 25℃).................................................................................................................................... 8
7.4. DC C
HARACTERISTICS
(VDD = 5.0V, T
A
= 25℃) ................................................................................................................................... 9
7.5. T
HE
R
ELATIONSHIP BETWEEN THE
R
OSC
AND THE
F
CPU
............................................................................................................................. 9
8. APPLICATION CIRCUITS......................................................................................................................................................................... 10
8.1. A
PPLICATION
C
IRCUIT
- (1)................................................................................................................................................................... 10
8.2. A
PPLICATION
C
IRCUIT
- (2)....................................................................................................................................................................11
8.3. A
PPLICATION
C
IRCUIT
- (3)................................................................................................................................................................... 12
8.4. A
PPLICATION
C
IRCUIT
- (4)................................................................................................................................................................... 13
9. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 14
9.1. PAD A
SSIGNMENT
............................................................................................................................................................................... 14
9.2. O
RDERING
I
NFORMATION
..................................................................................................................................................................... 14
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9.3. PAD L
OCATIONS
.................................................................................................................................................................................. 15
10. DISCLAIMER............................................................................................................................................................................................. 16
11. REVISION HISTORY ................................................................................................................................................................................. 17
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
2
SEP. 11, 2001
Version: 1.2
SPC251A2
256KB SOUND CONTROLLER
1. GENERAL DESCRIPTION
The SPC251A2 is a CPU based two-channel speech/melody
synthesizer including CMOS 8-bit microprocessor with 69
instructions, 256K-byte ROM for speech and melody data (Speech
is compressed by a 4-bit ADPCM with approx. 85 sec speech
duration @ 6KHz sampling rate) and 128-byte working SRAM.
two 8-bit current outputs (D/A).
It
includes two Timer/Counters, 24 Software Selectable I/Os, and
and speech can be mixed into one output.
function.
3. FEATURES
!
8-bit microprocessor
!
Provides 256K-byte ROM for program and audio data
!
128-byte working SRAM
!
Software-based audio processing
!
Wide operating voltage: 2.4V - 3.6V @ 4.0MHz
3.6V - 5.5V @ 6.0MHz
wide voltage range of 2.4V - 5.5V and includes Low Voltage Reset
working voltage is less than 2.2V.
The Low Voltage Reset automatically resets when the
In addition, SPC251A2 has a
Clock Stop mode for power savings.
saves the RAM contents, but freezes the oscillator, causing all
other chip functions to be inoperative.
frequency is 6.0MHz.
cycles (min.) - 6 clock cycles (max.).
technical support of Sunplus.
not only the latest technology, but also the full commitment and
2. BLOCK DIAGRAM
8-bit
microprocessor
XI
XO
CLK
OSC
24
IOB7-0
(I/O)
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For audio processing, melody
It operates over a
!
Supports Crystal Resonator or Rosc (with Mask option)
!
Max. CPU clock: 4.0MHz @ 2.4V - 3.6V
6.0MHz @ 3.6V - 5.5V
!
Standby mode (Clock Stop mode) for power savings.
Max. 2µA @ 5.0V
!
500ns instruction cycle time @ 4.0MHz CPU clock
!
Provides 24 general I/Os
!
Two 12-bit timer/counters
!
6 INT sources
!
Key wake-up function
The power savings mode
The Max. CPU clock
It has an Instruction Cycle Rate of 2 clock
The SPC251A2 includes,
!
Approx. 85 sec speech
@ 6KHz sampling rate with 4-bit ADPCM
!
Two DA output
!
Low Voltage Reset
!
Volume control function
256K-byte
ROM
Two Timers
TimeBase
INT control
4. APPLICATION FIELD
!
Intelligent education toys
128-byte
SRAM
AUD1
Ex. Pattern to voice (animal, car, color, etc.)
Spelling (English or Chinese)
Math
Low
Voltage
Reset
Two
8-bit D/A
(current)
AUD2
!
High end toy controller
PINS
GENERAL
I/O
PORT
!
Talking instrument controller
!
General speech synthesizer
!
Industrial controller
IOC7-0
(I/O)
IOD7-0
(I/O)
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
3
SEP. 11, 2001
Version: 1.2
SPC251A2
5. SIGNAL DESCRIPTIONS*
Mnemonic
VDD
VSS
XI
XO
TEST
RESET
AUD1
AUD2
IOB0
IOB1
IOB2
IOB3
IOB4
IOB5
IOB6
IOB7
IOC0
IOC1
IOC2
IOC3
IOC4
IOC5
IOC6
IOC7
IOD0
IOD1
IOD2
IOD3
IOD4
IOD5
IOD6
IOD7
PIN No.
17
13, 14
19
18
22
16
20
21
31
32
33
1
2
3
4
5
Type
I
I
I
O
I
I
O
Power VDD
Power VSS
Oscillator crystal input or RESISTOR (Resistor should be connected to VDD)
Oscillator crystal output
TEST MODE
This pin is an active low reset for the chip.
AUDIO OUTPUT
Description
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Port B is an 8-bit bi-directional Input / Output port with Pull-low or Open-drain option.
As inputs, Port B can be in either the Pure or Pull-low states.
either Buffer or Open-drain NMOS types (Sink current).
As outputs, Port B can be
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
**See note 1 and 2 below.
Port C is an 8-bit bi-directional Input / Output port with Pull-high or Open-drain option.
As inputs, Port C can be in either the Pure or Pull-high states.
be a Buffer type or Open-drain type.
IOC0: Serial programming Data
IOC2: EXT COUNT IN
current) and Port C7 - 4 are Open-drain PMOS (Send current).
IOC1: Also selectable as an external interrupt PIN
As outputs Port C can
15
12
11
9
8
7
6
10
Port C3 - 0 are Open-drain NMOS type (Sink
**See note 1 and 2 below.
Open-drain option.
Port D is an 8-bit bi-directional programmable Input / Output port with Pull-low or
As inputs, Port D can be either Pure or Pull-low states.
outputs, Port D can be either Buffer or Open-drain PMOS (send current).
Also, Port D
30
29
28
27
26
25
24
23
As
can be software programmed for wake-up I/O pins. (Key Change, Wake-up I/O).
**See note 1 and 2 below.
* Refer to SPC Programming Guide for complete information.
**Note:
1.) Two input states can be specified; Pure Input, Pull-High or Pull Low.
2.) Three output states can be specified as Buffer output, Open Drain PMOS output (send), or Open Drain NMOS output (sink).
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
4
SEP. 11, 2001
Version: 1.2
SPC251A2
6. FUNCTIONAL DESCRIPTIONS
6.1. CPU
The 8-bit microprocessor of SPC251A2 is a high performance
processor equipped with Accumulator, Program Counter, X
Register, Stack pointer and Processor Status Register (this is the
same as the 6502 instruction structure).
specifications.
SPC251A2 is able to
perform with 6.0MHz (max.) depending on the application
6.7. Map of Memory and I/Os
*I/O PORT:
*MEMORY MAP (From ROM view)
─
PORT IOA
IOB
IOC
IOD
$0002
$0003
$0004
$0005
$00000
HW register, I/Os
$00080
USER RAM and
STACK
─
I/O CONFIG $0000
$0001
$00100
UNUSED
6.2. Oscillator
The SPC251A2 supports AT-cut parallel resonant oscillated
Crystal / Resonator or RC Oscillator or external clock sources by
mask option (select one from those three types).
recommendations.
The design of
application circuit should follow the vendors’ specifications or
X’TAL/ROSC circuits for most applications:
SPC251A2
XI/R
20 pf
(a) Crystal or
Ceramic Resonator
Connections
6.3. Mask Option
The SPC251A2 has the following mask option:
hSupports
Crystal Resonator or Rosc (with mask option).
6.4. ROM Area
The SPC251A2 provides a 256K-byte ROM that can be defined as
the program area, audio data area, or both.
and access address to fetch data.
users should program the BANK SELECT Register, choose bank,
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*NMI SOURCE:
SUNPLUS TEST
PROGRAM
$00200
─
INTA (from TIMER A)
$00600
*INT SOURCE:
USER'S PROGRAM &
DATA AREA
ROM BANK #0
─
INTA (from TIMER A)
─
INTB (from TIMER B)
─
CPU CLK / 1024
─
CPU CLK / 8192
$08000
ROM BANK #1
The diagrams listed below are typical
$10000
ROM BANK #2
$18000
─
CPU CLK / 65536
─
EXT INT
ROM BANK #3
SPC251A2
$1FFFF
$20000
ROM BANK #4
XO
XI/R
XO
VDD
Rosc
20 pf
ROM BANK #7
(b) RC Oscillator
Connections
$3FFFF
6.8. I/O Port Configurations*
Input/Output IOB port : IOB3 - 0
input data
output
data
OD-NMOS
or buffer
To access ROM,
logic_1
control
60K
OD : Open Drain
6.5. RAM Area
The SPC251A2 total RAM consists of 128 bytes (including Stack)
at locations from $80 through $FF.
Input/Output IOB port : IOB7 - 4
input data
output
data
logic_2
control
OD : Open Drain
5
SEP. 11, 2001
Version: 1.2
6.6. Volume Control Function
The SPC251A2 contains a volume control function that provides
an 8-step volume controller to control current D/A output.
controller register is provided.
A
volume control function selector (Enable/Disable) register and
OD-NMOS
or buffer
60K
© Sunplus Technology Co., Ltd.
Proprietary & Confidential