SPL09A1
SP
5.5KB LCD Controller/Driver
AUG. 23, 2001
Version 1.0
SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO.
is believed to be accurate and reliable.
However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document.
Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by
SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products
are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may
reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus.
SPL09A1
Table of Contents
PAGE
1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3
2. BLOCK DIAGRAM ...................................................................................................................................................................................... 3
3. FEATURES.................................................................................................................................................................................................. 3
4. SIGNAL DESCRIPTIONS ........................................................................................................................................................................... 4
5. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 5
5.1. O
PERATING
S
TATES
............................................................................................................................................................................... 5
5.2. M
AP OF
M
EMORY AND
I/O
S
.................................................................................................................................................................... 5
5.3. T
IME
-S
ETTING
R
EGISTER
R
ELATED
........................................................................................................................................................ 5
5.4. T
IMER
/C
OUNTER
................................................................................................................................................................................... 5
5.5. W
ATCHDOG
T
IMER
(WDT) ..................................................................................................................................................................... 6
5.6. LCD C
ONTROLLER
/D
RIVER
.................................................................................................................................................................... 6
5.7. M
ASK
O
PTIONS
...................................................................................................................................................................................... 6
6. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 7
6.1. A
BSOLUTE
M
AXIMUM
R
ATINGS
............................................................................................................................................................... 7
6.2. DC C
HARACTERISTICS
........................................................................................................................................................................... 7
6.3. T
HE
R
ELATIONSHIP BETWEEN THE
R
OSC
AND THE
F
CPU
............................................................................................................................. 7
7. APPLICATION CIRCUITS........................................................................................................................................................................... 8
7.1. A
PPLICATION
C
IRCUIT
- (1)..................................................................................................................................................................... 8
7.2. A
PPLICATION
C
IRCUIT
- (2)..................................................................................................................................................................... 9
8. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 10
8.1. PAD A
SSIGNMENT
............................................................................................................................................................................... 10
8.2. O
RDERING
I
NFORMATION
..................................................................................................................................................................... 10
8.3. PAD L
OCATIONS
...................................................................................................................................................................................11
9. DISCLAIMER............................................................................................................................................................................................. 12
10. REVISION HISTORY ................................................................................................................................................................................. 13
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© Sunplus Technology Co., Ltd.
Proprietary & Confidential
2
AUG. 23, 2001
Version: 1.0
SPL09A1
5.5KB LCD CONTROLLER/DRIVER
1. GENERAL DESCRIPTION
The SPL09A1 is a CMOS 8-bit single chip microprocessor, which
contains RAM, ROM, I/Os, interrupt/wakeup controller, timer and
automatic display controller/driver for LCD.
SPL09A1
consume
little
power,
but
it
programmable standby mode for power saving.
for LCD hand-held products.
Not only does
also
contains
a
It is very suitable
3. FEATURES
!
Built-in 8-bit CPU
―
96 bytes SRAM
―
5.5K bytes ROM
―
Max. CPU frequency: 2.0MHz @ 3.0V
―
CPU clock frequency is programmable, 1/2,1/4,1/8,or 1/16
of RC oscillator frequency
―
Wide operating voltage : 2.4V - 3.6V
―
Provide 6 INT sources
2. BLOCK DIAGRAM
ROSC
Interrupt/wakeup
Control
5.5K bytes
ROM
96 bytes
RAM
LCD RAM
26 SEGMENTS X 5 COMMONS LCD DRIVER
COM4 - 0
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!
Built-in 32.768KHz crystal oscillator
automatically
32.768KHz
―
Crystal oscillator switches from strong to weak mode
―
Internal time base generator
―
Only one resistor is needed
!
Built-in RC oscillator
32.768KHz
Oscillator
&
Time base
10 I/O Ports
IOCD3 - 0
(I/O)
!
One 16 bits timer / counter
!
LCD controller
One 16-bit
Auto reload
Timer
8-bit
RISC
Processor
―
Max. 26 segments x 5 commons
―
1/2, 1/3 bias ; 1/2, 1/3, 1/4,1/5 duty
IOEF5 - 0
(I/O)
―
Provides useful display operation mode
―
Provides 2.2V low voltage reset
!
Low Voltage Reset
!
Low power consumption
―
Operating current: 300µA/1.0MHz @ 3.0V
―
Provides standby function (stop all oscillators)
―
Very low current in Halt mode
!
10 general purpose I/Os
SEG25 - 0
―
6 IO pins support Key wake-up mode
―
1 IO pin is shared with LCD common
―
2 IO pins are shared with LCD segments
Note: Patent Circuitry Included.
Taiwan Patent No. 68824.
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
3
AUG. 23, 2001
Version: 1.0
SPL09A1
4. SIGNAL DESCRIPTIONS
Mnemonic
SEG23 - 0
COM3 - 2
COM1 - 0
IOEF5 - 0
IOCD3 - 0
ROSC
RESET
X32I
X32O
TEST
VDD
VSS
VDD1, VDD2
CUP1, CUP2
LPWR
PIN No.
13 - 36
2-1
50 - 49
3-8
12 - 9
38
37
I/O
I/O
I
I
I/O port (IOEF5 can be optioned to COM4)
I/O port (IOCD3 can be optioned to SEG24, and IOCD2 can be optional to SEG25)
R-Oscillator input, connect to VDD through resistor
System reset input
Type
O
O
LCD driver segment output
LCD driver common output
Description
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41
I
32.768KHz crystal input (provide LCD frequency)
32.768KHz crystal output
42
O
I
39
TEST MODE
44
I
Positive supply voltage input
40
I
Ground Input
45, 46
47, 48
43
I
I
Inputs for setting LCD Bias
Inputs for setting LCD Bias
O
Regulated voltage output terminal for oscillators
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
4
AUG. 23, 2001
Version: 1.0
SPL09A1
5. FUNCTIONAL DESCRIPTIONS
SPL09A1 provides 5.5K byte ROM and a LCD driver which is
capable to drive 5 commons and 26 segments.
Halt mode.
The power
consumption of SPL09A1 is very low in both Standby mode and
It is very appropriate for LCD type hand-held product.
After the chip is awakened from Halt/standby State, CPU will
continue to execute the next instruction.
not be affected by wake-up.
The RAM and I/O will
5.2. Map of Memory and I/Os
5.1. Operating States
The SPL09A1 provides three states: standby, halt, and operating.
Following table shows the differences between the three states.
* I/O PORT:
─
PORT IOCD $0004
IOEF $0005
$0000
*MEMORY MAP (From ROM view)
$0000
$0060
H/W Register
I/Os, LCD RAM
UNUSED
CPU
32768 oscillator
LCD driver
In
operating
state,
timer/counter, LCD driver…) are activated.
register ($09) enters the Halt/standby State.
wake-up sources in SPL09A1: port IOEF wake-up, TIMR0
wake-up, 4Hz/8Hz/16Hz/32Hz wake-up and 2Hz/1Hz wake-up.
instruction.
any wake-up event occurs, CPU will continue to execute the next
In standby mode, all modules will be shut down, and RAM and
I/Os remain in their previous states.
minimized.
By writing to SLEEP register but keeps 32768
oscillator running, the system enters HALT State.
generate a wake-up in HALT State.
halted while it waits for an event (key press, timer overflow) to
(timer/counter, LCD driver…) are still active in the halt state.
Following figure is a state diagram for the SPL09A1.
Write to SLEEP register,
32768 oscillator OFF
OPERATING
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─
I/O CONFIG
Operating
ON
Halt
Standby
OFF
$0035
$0006
$00A0
OFF
ON
ON
ON
OFF
* NMI SOURCE
USER RAM and Stack
ON/OFF
OFF
─
INT1 (from TIMER 0)
$0100
$0400
UNUSED
* INT SOURCE
all
modules
(CPU,
32768
oscillator,
─
INT0 (from TIMER 0)
─
2KHz
SUNPLUS TEST
Writing the SLEEP
There are four
$0600
─
T16Hz (4Hz/8Hz/16Hz/32Hz)
─
128Hz
USER PROGRAM
UNUSED
$0800
If
─
EXT INT (from IOCD0 pin)
─
T2 Hz (2Hz/1Hz)
$0C00
USER PROGRAM
$1FFF
5.3. Time-Setting Register Related
wake-up and interrupt.
The current consumption is
Writing to TIME-SETTING register can program the timer of CPU
For example, the user can change 2Hz
wake-up and interrupt into 1Hz wake-up and interrupt by writing
80H into $0A. Thus, the system will wake up to service every
second.
Also, T16Hz (one of counter‘s clock source and
At power
wake-up & interrupt) can be one of 4Hz, 8Hz, 16Hz or 32Hz by
setting bit0 and bit1 of TIME-SETTING register ($0A).
on state, the default value of T16Hz is 4Hz and T2Hz is 2Hz.
CPU clock is
The 32768 related modules
STANDBY
5.4. Timer/Counter
Wake-up or user reset
SPL09A1 contains one 16-bit timer/counter, Timer0.
mode, Timer0 is auto-reload up-counters.
In the timer
When the timer
,
ter
gis
re N
P rO
EE ato
SL ill
to osc
rite 68
W 327
et
es
overflows from $FFFF to $0000, the carry signal will generate the
INT signal if the corresponding bit is enabled in INT ENABLE
register ($0D).
The timer will automatically reload the value
If Timer0 is
assigned by the program and count up continuously.
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
u
e-
ak
W
po
rr
se
ru
specified as a counter, the user can reset the counter by loading 0
into register $10 and $11 and loading 0 into the counter by writing
to $12.
After the counter is activated, the counter’s value can
also be read from above registers ($10 and $11) and the read
HALT
State Diagram of SPL09A1
instruction will not affect the counter's value or reset it.
5
AUG. 23, 2001
Version: 1.0
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