SPN7575
N-Channel Enhancement Mode MOSFET
DESCRIPTION
The SPN7575 is the N-Channel logic enhancement mode
power field effect transistors are produced using high cell
density , DMOS trench technology.
This high density process is especially tailored to
minimize on-state resistance.
This device is particularly suited for E Bike application.
APPLICATIONS
DC/DC Converter
Load Switch
Power Tool
FEATURES
75V/80A, R
DS(ON)
= 11mΩ@V
GS
= 10V
Super high density cell design for extremely low
RDS (ON)
Exceptional on-resistance and maximum DC
current capability
TO-220-3L package design
PIN CONFIGURATION( TO-220-3L )
PART MARKING
2011 / 08 / 04
Preliminary
Page 1
SPN7575
N-Channel Enhancement Mode MOSFET
PIN DESCRIPTION
Pin
1
2
3
Symbol
G
D
S
Description
Gate
Drain
Source
ORDERING INFORMATION
Part Number
SPN7575T220TG
※
SPN7575T220TG: Tube ; Pb – Free
Package
TO-220-3L
Part
Marking
SPN7575
ABSOULTE MAXIMUM RATINGS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Drain-Source Voltage
Gate –Source Voltage
Continuous Drain Current(T
J
=150
℃
)
Pulsed Drain Current
Avalanche Current
Power Dissipation
T
A
=25℃
T
A
=70℃
T
A
=25℃
T
A
=70℃
Symbol
V
DSS
V
GSS
I
D
I
DM
I
AS
P
D
EAS
T
J
T
STG
R
θJC
Typical
75
±20
90
80
370
52
200
140
165
-55/150
-55/150
0.75
Unit
V
V
A
A
A
W
mJ
Avalanche Energy with Single Pulse
( Tj=25℃, L = 500uH , I
AS
= 20A , V
DD
= 60V. )
Operating Junction Temperature
Storage Temperature Range
Thermal Resistance-Junction to Ambient
℃
℃
℃/W
2011 / 08 / 04
Preliminary
Page 2
SPN7575
N-Channel Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Leakage Current
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-Resistance
Forward Transconductance
Single Pulse Avalanche Energy
Diode Forward Voltage
Dynamic
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Time
Turn-Off Time
Symbol
Conditions
Min.
Typ
Max.
Unit
V
(BR)DSS
V
GS
=0V,I
D
=250uA
V
GS(th)
V
DS
=V
GS
,I
D
=250uA
I
GSS
I
DSS
I
D(on)
gfs
EAS
V
SD
Q
g
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
DD
=15V, I
D
=1A,
V
GEN
=10V, R
G
=3.3Ω
V
DS
=15V,V
GS
=0V
f=1MHz
V
DS
=0V,V
GS
=±20V
V
DS
=60V,V
GS
=0V
V
DS
=60V,V
GS
=0V
T
J
= 55 °C
V
DS
≥5V,V
GS
=10V
V
DS
=5V,I
D
=20A
V
DS
=60V, L=500uH,
I
AS
=20A
I
S
=30A,V
GS
=0V
75
2.0
4.0
±100
1
5
70
11
52
58
1.2
105
20
17
7760
320
210
19.5
11.5
118.5
11
12
V
nA
uA
A
mΩ
S
mJ
V
R
DS(on)
V
GS
= 10V, I
D
=40A
V
DS
=15V,V
GS
=10V
I
D
= 15A
nC
pF
nS
2011 / 08 / 04
Preliminary
Page 3
SPN7575
N-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
Fig. 1 Typical Output Characteristics
Fig. 2 On-Resistance vs. Gate Voltage
Fig. 3 Forward Characteristics of Reverse Diode
Fig. 4 Gate Charge Characteristics
Fig. 5 Vgs vs. Junction Temperature
Fig. 6 On Resistance vs. Junction Temperature
2011 / 08 / 04
Preliminary
Page 4
SPN7575
N-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
Fig. 7 Typical Capacitance Characteristics
Fig. 8 Maximum Safe Operation Area
Fig. 9 Effective Transient Thermal Impedence
Fig. 10 Switching Time Waveform
Fig. 11 Unclamped Inductive Waveform
2011 / 08 / 04
Preliminary
Page 5
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