ESMT
16Mbit (2Mx8)
F25L016A
Operation Temperature condition -40
°
C~85
°
C
3V Only Serial Flash Memory
FEATURES
Single supply voltage 2.7~3.6V
Speed
- Read max frequency : 33MHz
- Fast Read max frequency : 50MHz;100MHz
Low power consumption
- typical active current
- 15
μ
A typical standby current
Reliability
- 100,000 typical program/erase cycles
- 20 years Data Retention
Program
- Byte program time 9
μ
s(typical)
Erase
- Chip erase time 10s(typical)
- Block erase time 1sec (typical)
- Sector erase time 90ms(typical)
Auto Address Increment (AAI) WORD Programming
- Decrease total chip programming time over
Word-Program operations
SPI Serial Interface
- SPI Compatible : Mode 0 and Mode3
End of program or erase detection
Write Protect (
WP
)
Hold Pin ( HOLD )
All Pb-free products are RoHS-Compliant
ORDERING INFORMATION
Part No.
F25L016A –50PAIG
Speed
50MHz
Package
8 lead SOIC
8 lead SOIC
200mil
200mil
COMMENTS
Pb-free
Pb-free
F25L016A –100PAIG 100MHz
GENERAL DESCRIPTION
The F25L016A is a 16Megablt, 3V only CMOS Serial Flash
memory device organized as 2M bytes of 8 bits. This device is
packaged in 8-lead SOIC 200mil. ESMT’s memory devices
reliably store memory data even after 100,000 program and
erase cycles.
The F25L016A features a sector erase architecture. The device
memory array is divided into 512 uniform sectors with 4K byte
each ; 32 uniform blocks with 64K byte each. Sectors can be
erased individually without affecting the data in other sectors.
Blocks can be erased individually without affecting the data in
other blocks. Whole chip erase capabilities provide the flexibility
to revise the data in the device.
The sector protect/unprotect feature disables both program and
erase operations in any combination of the sectors of the
memory.
Elite Semiconductor Memory Technology Inc.
Publication Date: Jul. 2008
Revision:
1.2
1/32
ESMT
PIN CONFIGURATIONS
8-PIN SOIC
F25L016A
Operation Temperature condition -40
°
C~85
°
C
CE
1
8
VDD
SO
2
3
7
6
HOLD
SCK
WP
VSS
4
5
SI
PIN Description
Symbol
SCK
SI
Pin Name
Serial Clock
Serial Data Input
Functions
To provide the timing for serial input and
output operations
To transfer commands, addresses or data
serially into the device.
Data is latched on the rising edge of SCK.
To transfer data serially out of the device.
Data is shifted out on the falling edge of
SCK.
To activate the device when CE is low.
The Write Protect (
WP
) pin is used to
enable/disable BPL bit in the status
register.
To temporality stop serial communication
with SPI flash memory without resetting
the device.
To provide power.
SO
CE
WP
Serial Data Output
Chip Enable
Write Protect
HOLD
VDD
VSS
Hold
Power Supply
Ground
Elite Semiconductor Memory Technology Inc.
Publication Date: Jul. 2008
Revision:
1.2
2/32