ESMT
1. FEATURES
Single supply voltage 2.7V-3.6V
Fast access time: 70/90 ns
2,097,152x8 / 1,048,576x16 switchable by
BYTE
pin
Compatible with JEDEC standard
- Pin-out, packages and software commands
compatible with single-power supply Flash
Low power consumption
- 7mA typical active current
- 25uA typical standby current
100,000 program/erase cycles typically
20 Years Data Retention
Command register architecture
- Byte Word Programming (9μs/11μs typical)
- Byte Mode : One 16KB, two 8KB, one 32KB, and
thirty-one 64KB sectors.
- Word Mode : one 8K word, two 4K word, one 16K
word, and thirty-one 32 K word sectors.
Auto Erase (chip & sector) and Auto Program
- Any combination of sectors can be erased
concurrently; Chip erase also provided.
- Automatically program and verify data at specified
address
Erase Suspend/Erase Resume
- Suspend or Resume erasing sectors to allow the
read/program in another sector
F49L160UA/F49L160BA
16 Mbit (2M x 8/1M x 16)
3V Only CMOS Flash Memory
Ready/Busy (RY/
BY
)
- RY/
BY
output pin for detection of program or erase
operation completion
End of program or erase detection
- Data polling
- Toggle bits
Hardware reset
- Hardware pin(
RESET
) resets the internal state machine
to the read mode
Sector Protection /Unprotection
- Hardware Protect/Unprotect any combination of sectors
from a program or erase operation.
Low V
CC
Write inhibit is equal to or less than 2.0V
Boot Sector Architecture
- U = Upper Boot Block
- B = Bottom Boot Block
Packages available:
- 48-pin TSOPI
-
All Pb-free products are RoHS-Compliant
CFI (Common Flash Interface) complaint
- Provides device-specific information to the system,
allowing host software to easily reconfigure to different
Flash devices.
2. ORDERING INFORMATION
Part No
Boot
Speed Package Comments
70 ns
70 ns
TSOPI
TSOPI
Pb-free
Pb-free
Part No
Boot
Speed
90 ns
90 ns
Package
TSOPI
TSOPI
Comments
Pb-free
Pb-free
F49L160UA-70TG Upper
F49L160BA-70TG Bottom
F49L160UA-90TG Upper
F49L160BA-90TG Bottom
3. GENERAL DESCRIPTION
The F49L160UA/F49L160BA is a 16 Megabit, 3V only
CMOS Flash memory device organized as 2M bytes of 8
bits or 1M words of 16bits. This device is packaged in
standard 48-pin TSOP. It is designed to be programmed
and erased both in system and can in standard EPROM
programmers.
With access times of 70 ns and 90 ns, the
F49L160UA/F49L160BA allows the operation of
high-speed microprocessors. The device has separate
chip enable
CE
, write enable
WE
, and output enable
OE
controls. ESMT's memory devices reliably store
memory data even after 100,000 program and erase
cycles.
The F49L160UA/F49L160BA is entirely pin and command
set compatible with the JEDEC standard for 16 Megabit
Flash memory devices. Commands are written to the
command register using standard microprocessor write
timings.
The F49L160UA/F49L160BA features a sector erase
architecture. The device array is divided into one 16KB,
two 8KB, one 32KB, and thirty-one 64KB for byte mode.
The device memory array is divided into one 8K word, two
4K word, one 16K word, and thirty-one 32K word sectors
for word mode. Sectors can be erased individually or in
groups without affecting the data in other sectors.
Multiple-sector erase and whole chip erase capabilities
provide the flexibility to revise the data in the device.
The sector protect/unprotect feature disables both
program and erase operations in any combination of the
sectors of the memory. This can be achieved in-system or
via programming equipment.
A low V
CC
detector inhibits write operations on loss of
power. End of program or erase is detected by the
Ready/Busy status pin, Data Polling of DQ7, or by the
Toggle Bit I feature on DQ6. Once the program or erase
cycle has been successfully completed, the device
internally resets to the Read mode.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jan. 2008
Revision: 1.8
1/50
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