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ES29DL320DT-55TG

产品描述Flash, 2MX16, 55ns, PDSO48
产品类别存储    存储   
文件大小773KB,共59页
制造商优先(苏州)半导体
官网地址http://www.excel-semi.com/
标准
下载文档 详细参数 全文预览

ES29DL320DT-55TG概述

Flash, 2MX16, 55ns, PDSO48

ES29DL320DT-55TG规格参数

参数名称属性值
是否Rohs认证符合
包装说明TSSOP, TSSOP48,.8,20
Reach Compliance Codeunknown
最长访问时间55 ns
备用内存宽度8
启动块TOP
命令用户界面YES
通用闪存接口YES
数据轮询YES
JESD-30 代码R-PDSO-G48
内存密度33554432 bit
内存集成电路类型FLASH
内存宽度16
部门数/规模8,63
端子数量48
字数2097152 words
字数代码2000000
最高工作温度70 °C
最低工作温度
组织2MX16
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装等效代码TSSOP48,.8,20
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行PARALLEL
电源3/3.3 V
认证状态Not Qualified
就绪/忙碌YES
部门规模8K,64K
最大待机电流0.00005 A
最大压摆率0.045 mA
表面贴装YES
技术CMOS
温度等级COMMERCIAL
端子形式GULL WING
端子节距0.5 mm
端子位置DUAL
切换位YES
类型NOR TYPE
Base Number Matches1

ES29DL320DT-55TG文档预览

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ADVANCED INFORMATION
E S I
I
ES
Excel Semiconductor inc.
ES29DL320D
32Mbit(4M x 8/2M x 16)
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
GENERAL FEATURES
• Single power supply operation
- 2.7V -3.6V for read, program and erase operations
• Simultaneous Read/Write operations
- Data can be continuously read from one bank while
executing erase/program functions in another bank
- Zero latency between read and write operations
• Multi-Bank architecture
- Read may occur in any of the banks not being
written or erased
- Multi-Bank may be grouped by customer to achieve
desired bank divisions
• Top or Bottom boot block
- ES29DL320DT for Top boot block device
- ES29DL320DB for Bottom boot block device
• A 256 bytes of extra sector for security code
- Factory lockable
- Customer lockable
• Package Options
- 48-pin TSOP
- 48-ball FBGA
- All Pb-free products are RoHS-Compliant
• Power consumption (typical values)
- 30uA in standby or automatic sleep mode
- 10 mA active read current at 5 MHz
- 15mA active write current during program or erase
• Minimum 100,000 program/erase cycles per sector
• 20 Year data retention at 125
o
C
SOFTWARE FEATURES
Erase Suspend / Erase Resume
Data# poll and toggle for Program/erase status
CFI ( Common Flash Interface) supported
Unlock Bypass program
Autoselect mode
Auto-sleep mode after t
ACC
+ 30ns
HARDWARE FEATURES
• Hardware reset input pin ( RESET#)
- Provides a hardware reset to device
- Any internal device operation is terminated and the
device returns to read mode by the reset
• Ready/Busy# output pin ( RY/BY#)
- Provides a program or erase operational status
about whether it is finished for read or still being
progressed
• WP#/ACC input pin
- Two outermost boot sectors are protected when
WP# is set to low, regardless of sector protection
- Program speed is accelerated by raising WP#/ACC
to a high voltage (8.5 ~9.5V)
• Sector protection / unprotection ( RESET# , A9 )
- Hardware method of locking a sector to prevent
any program or erase operation within that sector
- Two methods are provided :
- In-system method by RESET# pin
- A9 high-voltage method for PROM programmers
• Temporary Sector Unprotection ( RESET# )
- Allows temporary unprotection of previously
protected sectors to change data in-system
• Low Vcc write inhibit
• Manufactured on 0.18um process technology
• Compatible with JEDEC standards
- Pinout and software compatible with single-power
supply flash standard
DEVICE PERFORMANCE
• Read access time
- 55ns/70ns/90n for normal Vcc range ( 2.7V - 3.6V )
• Program and erase time
- Program time : 6us/byte, 8us/word ( typical )
- Accelerated program time : 4us/word ( typical )
- Sector erase time : 0.7sec/sector ( typical )
ES29DL320D
1
Rev. 0C Jan 5, 2006
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