REV. 1.5
FS98O21-DS-15_EN
JUL 2011
Datasheet
FS98O21
8-bit MCU with 2k program EPROM, 128-byte RAM,
1 low noise OPAMP, 6-ch 14-bit ADC,
4 × 12 LCD driver and RTC
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FS98O21
Fortune Semiconductor Corporation
富晶電子股½有限公司
28F,No.27, Sec. 2, Zhongzheng E. Rd.,
Danshui Dist, New Taipei City 251, Taiwan
Tel.：886-2-28094742
Fax：886-2-28094874
www.ic-fortune.com
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This manual contains new product information.
Fortune Semiconductor Corporation
reserves the rights to
Corporation
as a result of the use of this product. No rights under any patent accompany the sale of the
product.
modify the product specification without further notice. No liability is assumed by
Fortune Semiconductor
Rev. 1.5
2/136
FS98O21
Contents
1.
DEVICE OVERVIEW ................................................................................................................................ 10
1.1
1.2
1.3
1.4
High Performance RISC CPU ..................................................................................................... 10
Peripheral Features..................................................................................................................... 10
Analog Features .......................................................................................................................... 10
Special Microcontroller Features ............................................................................................... 10
CMOS Technology ...................................................................................................................... 10
Applications................................................................................................................................. 11
Ordering Information .................................................................................................................. 11
Pin Configuration ........................................................................................................................ 12
Pin Description ............................................................................................................................ 13
Functional Block Diagram .......................................................................................................... 14
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1.5
1.6
1.7
1.8
1.9
1.10
1.11
CPU Core ..................................................................................................................................... 16
Clocking Scheme/Instruction Cycle .......................................................................................... 18
1.12
2.
ELECTRICAL CHARACTERISTICS ........................................................................................................ 19
2.1
2.2
Absolute Maximum Ratings ....................................................................................................... 19
DC Characteristics (VDD=3V, T
A
=25℃, unless otherwise noted) ............................................ 19
ADC Characteristics (VDD=3V, T
A
=25℃, unless otherwise noted) ......................................... 20
OPAMP Characteristics (VDD=3V, T
A
=25℃, unless otherwise noted) .................................... 20
2.3
2.4
3.
MEMORY ORGANIZATION ...................................................................................................................... 21
3.1
3.2
3.3
Program Memory Structure ........................................................................................................ 21
Data Memory Structure ............................................................................................................... 21
System Special Registers........................................................................................................... 22
Special Register Contents after External Reset (Power On Reset) and WDT Reset . 22
IND and FSR Registers ................................................................................................... 23
STATUS Register ............................................................................................................. 24
INTE and INTF registers.................................................................................................. 25
3.3.1
3.3.2
3.3.3
3.3.4
3.4
Peripheral Special Registers ...................................................................................................... 27
4.
POWER SYSTEM ..................................................................................................................................... 28
4.1
4.2
4.3
4.4
4.5
4.6
Voltage Doubler ........................................................................................................................... 32
Voltage Regulator ........................................................................................................................ 34
Analog Bias Circuit ..................................................................................................................... 35
Analog Common Voltage Generator .......................................................................................... 36
Low Battery Comparator ............................................................................................................ 37
Bandgap Voltage and Temperature Sensor .............................................................................. 38
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FS98O21
5.
CLOCK SYSTEM ..................................................................................................................................... 39
5.1
5.2
5.3
5.4
5.5
5.6
5.7
Oscillator State ............................................................................................................................ 40
CPU Instruction Cycle ................................................................................................................ 42
ADC Sample Frequency ............................................................................................................. 43
Beeper Clock ............................................................................................................................... 44
Voltage Doubler Operation Frequency ...................................................................................... 46
Chopper Operation Amplifier Input Control Signal .................................................................. 47
TMCLK -- Timer and LCD Module Input Clock .......................................................................... 48
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6.
TIMER MODULE AND WATCH DOG TIMER........................................................................................... 49
6.1
Timer Module ............................................................................................................................... 51
Timer module interrupt ................................................................................................... 52
Using Timer with External/Internal Clock ...................................................................... 53
6.1.1
6.1.2
6.2
Watch Dog Timer ......................................................................................................................... 55
7.
I/O PORT .................................................................................................................................................. 56
7.1
7.2
7.3
Digital I/O Port with Analog Input Channel Shared: PT1[7:0] .................................................. 65
Digital I/O Port and External Interrupt Input : PT2[0], PT2[1] .................................................. 66
Digital I/O Port or PDM Output : PT2[2] ..................................................................................... 69
7.4
7.5
7.6
Digital I/O Port or I2C Serial Port : PT2[3]/SDA, PT2[4]/SCL .................................................... 71
Digital I/O Port : PT2[6:5] ............................................................................................................ 73
Digital I/O Port or Buzzer Output : PT2[7] ................................................................................. 75
8.
PDM (PULSE DENSITY MODULATOR) MODULE .................................................................................. 77
9.
I2C MODULE (SLAVE MODE ONLY) ...................................................................................................... 83
10. ANALOG FUNCTION NETWORK ........................................................................................................... 90
10.1
10.2
Analog to Digital Converter (ADC) :........................................................................................... 99
OPAMP : OP1 ............................................................................................................................. 103
11. ADC APPLICATION GUIDE ................................................................................................................... 105
11.1
ADC Output Format .................................................................................................................. 105
11.2
11.3
11.4
11.5
11.6
ADC Linear Range..................................................................................................................... 105
ADC Output Rate and Settling Time ........................................................................................ 105
ADC Input Offset ....................................................................................................................... 105
ADC Digital Output .................................................................................................................... 106
ADC Resolution ......................................................................................................................... 106
12. LOW NOISE OPERATION AMPLIFIER GUIDE ..................................................................................... 107
12.1
12.2
Single End Amplifier Application ............................................................................................. 107
Differential Amplifier ................................................................................................................. 108
13. LCD DRIVER .......................................................................................................................................... 109
14. HALT AND SLEEP MODES ................................................................................................................... 121
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FS98O21
15. INSTRUCTION SET ............................................................................................................................... 122
15.1
15.2
Instruction Set Summary.......................................................................................................... 122
Instruction Description ............................................................................................................. 124
16. PACKAGE INFORMATION .................................................................................................................... 135
16.1
Package Outline ........................................................................................................................ 135
17. REVISION HISTORY .............................................................................................................................. 136
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Rev. 1.5
5/136
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