0.56" 7-Segment Numeric LED
Displays With MOS I.C. Driver
LTM-8500 Series
Features
0.56 inch (14.22mm) digit height.
Wide supply voltage operation.
Serial data input.
Constant Current drivers.
Continuous brightness control.
Solid state reliability-long operation life.
Wide viewing angle.
Choices of five bright colors/bright red/green/yellow/
red orange/high efficiency red.
TTL compatible.
Package Dimensions
A. LTM-8522
Description
The LTM-8500 series are 0.56 inch (14.22mm) numeric
display modules, and a built-in M5450 MOS integrated
circuits. The integrated circuit contains serial data input,
35 bits shift register. 34 LED driver output and a bright-
ness control.
The bright red yellow and green devices utilize LED
chips which are made from GaP on a transparent GaP
substrate. The red orange and high efficiency red de-
vices utilize LED chips which are made from GaAsP on
a transparent GaP substrate. The MOS integrated cir-
cuits are produced with N-channel silicon gate
technology.
Bright red displays have black face and red segments.
Green and yellow displays have gray face and white
segments. Red orange displays have orange face and
orange segments. High efficiency red displays have
red face and red segments.
B. LTM-8529
C. LTM-8530
Notes: All dimensions are in millimeters (inches)
Tolerance :
0.25mm (0.010") unless other-
wise noted.
9-205
16-m8500.p65
Page 205
2000/7/11, ¤U¤È 07:33
Adobe PageMaker 6.5C/Win
DISPLAYS
Devices
Part No. LTM-
Description
Bright Red
8522P
8529P
8530P
Green
8522G
8529G
8530G
Yellow
8522Y
8529Y
8530Y
Red Orange Hi.-Eff. Red
8522E
8529E
8530E
8522HR
8529HR
8530HR
3 Digit, Rt. Hand Decimal
1 /
2
Digit, Rt. Hand Decimal
2 Digit, Rt. Hand Decimal
1
Pockage
Dimension
A
B
C
Pin Connection
Connection
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
LTM-8522
Vss
V
LED
V
LED
Bit 25 Output
Bit 26 Output
Bit 27 Output
Bit 28 Output
Bit 29 Output
Bit 30 Output
Bit 31 Output
Bit 32 Output
Bit 33 Output
Bit 34 Output
Data Enable
Data Input
Clock Input
V
DD
BRT. Control
LTM-8529
Vss
V
LED
No Pin
No Pin
No Pin
Bit 15 Output
Bit 16 Output
Bit 17 Output
Bit 18 Output
Bit 19 Output
Bit 20 Output
Bit 21 Output
Bit 22 Output
Data Enable
Data Input
Clock Input
V
DD
BRT. Control
LTM-8530
Vss
V
LED
No Pin
No Pin
No Pin
Bit 17 Output
Bit 18 Output
Bit 19 Output
Bit 20 Output
Bit 21 Output
Bit 22 Output
Bit 23 Output
Bit 24 Output
Data Enable
Data Input
Clock Input
V
DD
BRT. Control
Absolute Maximum Ratings at Ta=25
Parameter
Supply Voltage*1
Input Voltage
Off State Output Voltage
LED Supply Voltage
Power Dissipation of IC*2
Supply Current
Operating Temperature Range
Storage Temperature Range
Symbol
V
DD
V
I
V
O
(off)
V
LED
P
D
(IC)
I
DD
Top
Tstg
Min.
-0.3
-0.3
2.8
Max.
12
12
12
3.5
335
8.5
Unit
V
V
V
V
mW
mA
-20
-20
+60
+60
Solder Temperature 1/16 Inch Below Seating Plane for 3 Seconds at 260
Note : 1. All voltages are with respect to Vss(GND)
2. Power dissipation of IC is given by P
D
=(V
LED
-V
F
)
*V
F
is LED forward voltage.
(I
F
)
(No. of Segments)+(8.5mA)
(V
DD
)
9-206
Recommended Operating Condition at Ta=25
Parameter
Supply Voltage
Input Voltage
Logical 0
Logical 1
Logical 1
Level
Level
Level
Symbol
V
DD
Min.
4.75
-0.3
2.2
V
DD
-2
0
3
Typ.
Max.
11
0.8
V
DD
V
DD
0.75
4.3
11
10
Unit
V
V
V
V
mA
V
V
A
mA
mA
MHZ
%
Test Condition
V
I
I
B
V
B
V
O
(off)
10 A Input Bias
4.75V<V
DD
<5.25V
V
DD
>5.25V
Input Current =750
A
Brightness Input Current
Brightness Input Voltage
Off State Voltage
Output Sink Current
Segment Off
Segment On
Input Clock Frequency
Output Matching
F
CLOCK
I
O
0
0.5
20
Electrical/Optical Characteristics at Ta=25
LTM-8522P/8529P/8530P
Parameter
Average Luminous Intensity
Peak Emission Wavelength
Spectral Line Half-Width
Dominant Wavelength
Luminous Intensity Matching Ratio
d
I
V
-m
Symbol
I
V
P
Min.
320
Typ.
950
697
90
657
Max.
Unit
cd
nm
nm
nm
Test Condition
I
B
=0.4mA
I
B
=0.4mA
I
B
=0.4mA
I
F
=20mA
I
B
=0.4mA
2:1
LTM-8522G/8529G/8530G
Parameter
Average Luminous Intensity
Peak Emission Wavelength
Spectral Line Half-Width
Dominant Wavelength
Luminous Intensity Matching Ratio
d
I
V
-m
Symbol
I
V
P
Min.
800
Typ.
2400
565
30
569
Max.
Unit
cd
nm
nm
nm
Test Condition
I
B
=0.4mA
I
B
=0.4mA
I
B
=0.4mA
I
F
=20mA
I
B
=0.4mA
2:1
LTM-8522Y/8529Y/8530Y
Parameter
Average Luminous Intensity
Peak Emission Wavelength
Spectral Line Half-Width
Dominant Wavelength
Luminous Intensity Matching Ratio
d
I
V
-m
Symbol
I
V
P
Min.
800
Typ.
2400
585
35
588
Max.
Unit
cd
nm
nm
nm
Test Condition
I
B
=0.4mA
I
B
=0.4mA
I
B
=0.4mA
I
F
=20mA
I
B
=0.4mA
2:1
LTM-8522E/8529E/8530E
Parameter
Average Luminous Intensity
Peak Emission Wavelength
Spectral Line Half-Width
Dominant Wavelength
Luminous Intensity Matching Ratio
d
I
V
-m
Symbol
I
V
P
Min.
800
Typ.
2400
630
40
621
Max.
Unit
cd
nm
nm
nm
Test Condition
I
B
=0.4mA
I
B
=0.4mA
I
B
=0.4mA
I
F
=20mA
I
B
=0.4mA
2:1
9-207
DISPLAYS
3
6
I
F
=0 A
I
B
=100 A
I
F
=200 A
LTM-8522HR/8529HR/8530HR
Parameter
Average Luminous Intensity
Peak Emission Wavelength
Spectral Line Half-Width
Dominant Wavelength
Luminous Intensity Matching Ratio
d
I
V
-m
Symbol
I
V
P
Min.
800
Typ.
2400
635
40
623
Max.
Unit
cd
nm
nm
nm
Test
Condition
I
B
=0.4mA
I
B
=0.4mA
I
B
=0.4mA
I
F
=20mA
I
B
=0.4mA
2:1
Note: Luminous intensity is measured with a light sensor and filter combination that approximates the CIE (Commision
Internationale De L’Eclairage) eye-response curve.
Functional Description
Serial data transfer from the data source to the display driver is accomplished with 2 signals serial data and clock.
Using a format of a leading "1" followed by the 35 data bits allow data transfer without an additional load signal.
The 35 data bits are latched after the 36th bit is completed, thus providing non multiplexed, direct drive to the display.
Outputs change only if the serial data bits differ from the previous time.
Brightness of display is determined by control the output current of LED display. A 1nF capacitor should be connected
to brightness control, Pin 7 to prevent possible oscillations. The output current is typically 25 times greater than the
current into Pin 7 which is set by an external variable resistor. There is an internal limiting resistor of 400 nominal
value.
Figure 1 shows the input data format. A start bit of logical "1" preceed the 35 bits of data. At the 36th clock, a LOAD
signal is generated synchronously with the high state of the clock, which loads the 35 bits of the shift registers into
the latches. At the low state of the clock a RESET signal is generated which clears all the shift registers for the next
set of data . The shift registers are static master-slave configuration. There is no clear for master portion of the first
register, thus allowing continuous operation.
There must be a complete set of 36 clocks or the shift registers won't clear. When power is first applied to the chip,
an internal power ON, a reset signal is generated which reset all registers and all latches. The START bit and first
clock return the chip on its normal operation. Bit 1 is the first following the start bit and it will appear on the segment
A of the digit 1. A logical "1" at the input will turn on the appropriate LED. Figure 2 shows the timing relationship
between data, clock, and DATA ENABLE. A max. clock frequency of 0.5MHz is assumed.
Figure 1. Internal Block Diagram
Figure 2. Input Data Format
9-208
Figure 3. Timing Relationship
Table I Serial Data Input Sequence
Bit
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
LTM-8522
Digit
Segment
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
3
3
3
3
3
3
3
3
A
B
C
D
E
F
G
D.P.
A
B
C
D
E
F
G
D.P.
A
B
C
D
E
F
G
D.P.
Pin 4
Pin 5
Pin 6
Pin 7
Pin 8
Pin 9
Pin 10
Pin 11
Pin 12
Pin 13
Digit
1
1
1
1
1
1
2
2
2
2
2
2
2
2
LTM-8529
Segment
B
C
G
H
J
D.P.
A
B
C
D
E
F
G
D.P.
Pin 6
Pin 7
Pin 8
Pin 9
Pin 10
Pin 11
Pin 12
Pin 13
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
Digit
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
LTM-8530
Segment
A
B
C
D
E
F
G
D.P.
A
B
C
D
E
F
G
D.P.
Pin 6
Pin 7
Pin 8
Pin 9
Pin 10
Pin 11
Pin 12
Pin 13
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
9-209
DISPLAYS
详细参数
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