Silicon
N-Channel
Power
MOSFET
R
○
CS4N10 AE-1
General Description
：
CS4N10
AE-1,
the
silicon
N-channel
Enhanced
VDMOSFETs, is obtained by the high density Trench
technology which reduce the conduction loss, improve switching
performance and enhance the avalanche energy. This device is
suitable for use as a load switch and PWM applications.. The
package form is SOP8, which accords with the RoHS standard..
V
DSS
I
D
P
D
R
DS(ON)Typ
100
4
2
113
V
A
W
mΩ
Features：
l
Fast Switching
l
Low ON Resistance(
Rdson≤150 mΩ
)
l
Low Gate Charge
l
Low Reverse transfer capacitances
l
100% Single Pulse avalanche energy Test
Applications
：
Power switch circuit of adaptor and charger.
Absolute
（T
A
= 25℃ unless otherwise specified）
Symbol
V
DSS
I
D
I
DM
a1
Parameter
Drain-to-Source Voltage
Continuous Drain Current
Continuous Drain Current T
C
= 100
°C
Pulsed Drain Current
Gate-to-Source Voltage
Rating
100
4
3
16
±20
28.8
7.6
2
0.016
150，–55 to 150
Units
V
A
A
A
V
mJ
A
W
W/℃
℃
V
GS
E
AS
I
AS
P
D
T
J
，T
stg
a2
a2
Avalanche Energy
Avalanche Current
Power Dissipation
Derating Factor above 25°C
Operating Junction and Storage Temperature Range
W U X I C H I N A R E S O U R C E S H U A J I N G M I C R O E L E C T R O N I C S C O . , LT D .
Pag e 1 of 9
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CS4N10 AE-1
Electrical Characteristics
（T
J
= 25℃ unless otherwise specified）
：
OFF Characteristics
Symbol
V
DSS
I
DSS
I
GSS(F)
I
GSS(R)
Parameter
Drain to Source Breakdown Voltage
Drain to Source Leakage Current
Gate to Source Forward Leakage
Gate to Source Reverse Leakage
R
○
Test Conditions
V
GS
=0V, I
D
=250µA
V
DS
= 100V, V
GS
= 0V,
T
a
= 25℃
V
DS
=80V, V
GS
= 0V,
T
a
= 125℃
V
GS
=20V
V
GS
=-20V
Rating
Min.
Typ.
Max.
Units
V
µA
nA
nA
100
--
--
--
--
--
--
--
--
--
--
1
100
100
-100
ON Characteristics
Symbol
R
DS(ON)
R
DS(ON)
V
GS(TH)
Parameter
Drain-to-Source On-Resistance
Drain-to-Source On-Resistance
Gate Threshold Voltage
Test Conditions
V
GS
=10V,I
D
=4A
V
GS
=4.5V,I
D
=3A
V
DS
= V
GS
, I
D
= 250µA
Rating
Min.
--
--
1.8
Typ.
113
135
2.4
Max.
150
190
2.9
Units
mΩ
mΩ
V
Pulse width tp≤300µs,δ≤2%
Dynamic Characteristics
Symbol
R
g
C
iss
C
oss
C
rss
Parameter
Gate resistance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V
GS
= 0V V
DS
=50V
f = 1.0MHz
Test Conditions
VGS=0V, VDS=0V, f=1MHz
Rating
Min.
--
--
--
Typ.
3.4
556.5
34.7
18.7
Max.
--
--
--
--
Units
Ω
pF
Resistive Switching Characteristics
Symbol
t
d(ON)
tr
t
d(OFF)
t
f
Q
g
(
V
GS
=4.5V
)
Q
g
(
V
GS
=10V
)
Q
gs
Q
gd
Parameter
Turn-on Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain (“Miller”)Charge
Vdd=50V，Id=4A，
V
GS
=10V，R
G
=3Ω
V
DD
=50V，I
D
=4A
Test Conditions
Rating
Min.
--
--
--
--
--
--
--
--
Typ.
8.5
6.3
29.2
3.2
5.8
11.5
2.2
2.6
Max.
--
--
--
--
--
--
--
--
Units
ns
nC
W U X I C H I N A R E S O U R C E S H U A J I N G M I C R O E L E C T R O N I C S C O . , LT D .
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CS4N10 AE-1
R
○
Source-Drain Diode Characteristics
Symbol
I
S
I
SM
V
SD
trr
Qrr
Parameter
Continuous Source Current (Body Diode)
Maximum Pulsed Current (Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
I
S
=4.0A,V
GS
=0V
I
S
=4.0A,T
j
= 25°C
dI
F
/dt=100A/us,
V
GS
=0V
Test
Conditions
Rating
Min.
--
--
--
--
--
Typ.
--
--
--
59.2
107.7
Max.
4
16
1.5
--
--
Units
A
A
V
ns
nC
Pulse width tp≤300µs,δ≤2%
Symbol
R
θ
JA
a1
a2
Parameter
Junction-to-Ambient
Max.
62.5
Units
℃/W
：Repetitive
rating; pulse width limited by maximum junction temperature
：L=1.0mH,
I
D
=7.6A, Start T
J
=25℃
a3
：Recommend
soldering temperature defined by IPC/JEDEC J-STD 020
W U X I C H I N A R E S O U R C E S H U A J I N G M I C R O E L E C T R O N I C S C O . , LT D .
Pag e 3 of 9
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CS4N10 AE-1
Characteristics Curve：
R
○
Figure 1 Maximun Forward Bias Safe Operating Area
Figure 2 Typical Output Characteristics
Figure 3 Typical Drain to Source ON Resistance vs Drain Current
Figure 4 Typical Transfer Characteristics
Figure 5 Maximum Effective Thermal Impendance ,
Junction to
Ambient
Figure 6 Body Diode Forward Voltage vs. Source
Current and Temperature
Pag e 4 of 9
W U X I C H I N A R E S O U R C E S H U A J I N G M I C R O E L E C T R O N I C S C O . , LT D .
2 0 1 8 V0 1
CS4N10 AE-1
R
○
Figure 7 Typical Capacitance vs Drain to Source Voltage
Figure 8 Typical Gate Charge vs Gate to Source Voltage
Figure 9 Typical Breakdown Voltage vs Junction Temperature
Figure 10 Typical Drian to Source on Resistance
vs Junction Temperature
Figure 11 Drain-to-Source On Resistance vs Gate Voltage
and Drain Current
Figure 11 Drain-to-Source On Resistance vs Gate Voltage
and Drain Current
Figure 12 Typical Threshold Voltage vs Junction Temperature
W U X I C H I N A R E S O U R C E S H U A J I N G M I C R O E L E C T R O N I C S C O . , LT D .
Pag e 5 of 9
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嵌入式系统
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