ESD9X5VL
ESD9X5VL
1-Line, Uni-directional, Ultra-low Capacitance
Transient Voltage Suppressor
http//:www.sh-willsemi.com
Descriptions
The ESD9X5VL is a Uni-directional transient voltage
suppressor (TVS) which provide a very high level protection
for sensitive electronic components that may be subjected to
electrostatic discharge (ESD). It is designed to replace
multilayer
LCD TV etc.
The
ESD9X5VL
incorporates
one
pair
of
ultra-low
varistors
(MLV)
in
consumer
equipment
FBP-02C (Bottom View)
applications such as mobile phone, notebook, PAD, STB,
capacitance steering diodes plus a TVS diode.
The ESD9X5VL may be used to provide ESD protection up to
±20kV
(contact
and
air
discharge)
according
to
IEC61000-4-2, and withstand peak pulse current up to 4A for
8/20μs pulse according to IEC61000-4-5.
The ESD9X5VL is available in FBP-02C package. Standard
products are Pb-free and Halogen-free.
Circuit diagram
Pin1
Pin2
Features
Pin1
Stand-off voltage: 5V max.
Transient protection for each line according to
IEC61000-4-2 (ESD): ±20kV (contact and air discharge)
IEC61000-4-4 (EFT): 40A (5/50ns)
IEC61000-4-5 (surge): 4A (8/20μs)
*.X
Pin2
* = Month code ( A~Z)
.X= Device code
Marking (Top View)
Ultra-low capacitance: C
J
= 1.2pF typ.
Ultra-low leakage current: I
R
<1nA typ.
Low clamping voltage: V
CL
= 18V typ. @ I
PP
= 16A (TLP)
Solid-state silicon technology
Device
Order information
Package
FBP-02C
Shipping
10000/Tape&Reel
Applications
USB 2.0 and USB 3.0
HDMI 1.3 and HDMI 1.4
SATA and eSATA
DVI
IEEE 1394
PCI Express
Portable Electronics and Notebooks
ESD9X5VL-2/TR
Will Semiconductor Ltd.
1
Revision 2.5, 2018/04/23
ESD9X5VL
Absolute maximum ratings
Parameter
Peak pulse power (t
p
= 8/20μs)
Peak pulse current (t
p
= 8/20μs)
ESD according to IEC61000-4-2 air discharge
ESD according to IEC61000-4-2 contact discharge
Junction temperature
Operation temperature
Lead temperature
Storage temperature
Symbol
P
pk
I
PP
V
ESD
T
J
T
OP
T
L
T
STG
Rating
60
4
±20
±20
125
-40~85
260
-55~150
Unit
W
A
kV
o
o
o
o
C
C
C
C
Electrical characteristics
(T
A
= 25
o
C, unless otherwise noted)
Parameter
Reverse maximum working voltage
Reverse leakage current
Reverse breakdown voltage
Forward voltage
Clamping voltage
1)
1)
Symbol
V
RWM
I
R
V
BR
V
F
V
CL
R
DYN
Condition
Min.
Typ.
Max.
5.0
Unit
V
nA
V
V
V
Ω
V
RWM
= 5V
I
BR
= 1mA
I
F
= 10mA
I
PP
= 16A, t
p
= 100ns
7.0
0.6
<1
8.0
0.9
18.0
0.59
100
9.0
1.2
Dynamic resistance
Clamping voltage
2)
I
PP
= 1A, t
p
= 8/20μs
V
CL
C
J
I
PP
= 4A, t
p
= 8/20μs
V
R
= 0V, f = 1MHz
1.2
11.0
15.0
1.6
V
V
pF
Junction capacitance
Notes:
1)
TLP parameter: Z
0
= 50 Ω, t
p
= 100ns, t
r
= 2ns, averaging window from 60ns to 80ns. R
DYN
is calculated from 4A to
16A.
2)
Non-repetitive current pulse, according to IEC61000-4-5.
Will Semiconductor Ltd.
2
Revision 2.5, 2018/04/23
ESD9X5VL
Typical characteristics
(T
A
= 25
o
C, unless otherwise noted)
100
90
Front time: T1= 1.25
T = 8
s
Time to half-value:
T2=
20
s
Peak pulse current (%)
100
90
50
T
2
Current (%)
10
10
0
0
T
5
T
1
10
15
Time (
s)
20
25
30
30ns
t
r
= 0.7~1ns
60ns
t
Time (ns)
8/20μs waveform per IEC61000-4-5
Contact discharge current waveform per IEC61000-4-2
V
C
- Clamping voltage (V)
12.5
12.0
11.5
11.0
10.5
10.0
9.5
9.0
0.5
Pulse waveform: t
p
= 8/20
s
C
J
- Junction capacitance (pF)
13.0
2.0
1.6
1.2
0.8
0.4
0.0
f = 1MHz
V
AC
= 50mV
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0
1
2
3
4
5
I
PP
- Peak pulse current (A)
V
R
- Reverse voltage (V)
Clamping voltage vs. Peak pulse current
1000
Capacitance vs. Reverse voltage
100
Peak pulse power (W)
% of Rated power
100
80
60
40
20
0
10
1
1
10
100
Pulse time (
s)
1000
0
25
50
75
100
o
125
150
T
A
- Ambient temperature ( C)
Non-repetitive peak pulse power vs. Pulse time
Power derating vs. Ambient temperature
Will Semiconductor Ltd.
3
Revision 2.5, 2018/04/23
ESD9X5VL
Typical characteristics
(T
A
= 25
o
C, unless otherwise noted)
10V/div
10V/div
20ns/div
20ns/div
ESD clamping
(+8kV contact discharge per IEC61000-4-2)
ESD clamping
(-8kV contact discharge per IEC61000-4-2)
20
18
16
Z
0
= 50
t
r
= 2ns
t
p
= 100ns
TLP current (A)
14
12
10
8
6
4
2
0
-2
0
2
4
6
8
10
12
14
16
18
20
TLP voltage (V)
TLP Measurement
Will Semiconductor Ltd.
4
Revision 2.5, 2018/04/23
ESD9X5VL
Package outline dimensions
FBP-02C
L
D
L2
L1
L3
D1
e1
e
Top View
Symbol
A
A1
A1
Bottom View
Dimensions In Millimeters
Min.
0.450
0.010
0.950
0.550
Typ.
0.500
--
1.000
0.600
0.470 Ref.
0.420 Ref.
0.270
0.250
0.555
0.250
0.370
0.320
0.300
0.605
0.230 Ref.
0.300
0.030 Ref.
0.420
0.040 Ref.
0.470
0.350
0.370
0.350
0.655
Max.
0.550
0.100
1.050
0.650
D
E
D1
E1
b
A
Side View
b1
e
e1
L
L1
Recommended land pattern (Unit: mm)
L2
L3
0.40
0.40
Notes:
This recommended land pattern is for reference
purposes only. Please consult your manufacturing
0.62
0.18
0.50
group to ensure your PCB design guidelines are met.
Will Semiconductor Ltd.
5
Revision 2.5, 2018/04/23
E1
b1
E
b
嵌入式系统
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