UNISONIC TECHNOLOGIES CO., LTD
4052
DIFFERENTIAL 4-CHANNEL
ANALOG MULTIPLEXERS/
DEMULTIPLEXERS
DESCRIPTION
CMOS IC
The UTC
4052
is differential 4-channel analog multiplexers/
demultiplexers for application as digitally–controlled analog switches.
The device has two binary control inputs and an inhibit input. It
feature low ON impedance and very low OFF leakage current.
Control of analog signals up to the complete supply voltage range
can be achieved.
FEATURES
* Wide Analog Voltage Range: V
DD
–V
EE
= 3V~18V.
(Note: V
EE
must be≦V
SS
)
* Break-Before-Make Switching Eliminates Channel Overlap.
* Linearized Transfer Characteristics
* Implement an DP4T Switch Effectively.
* Pin to Pin Replacement for CD4052
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
4052L-D16-T
4052G-D16-T
-
4052G-S16-R
-
4052G-P16-R
Package
DIP-16
SOP-16
TSSOP-16
Packing
Tube
Tape Reel
Tape Reel
MARKING
DIP-16
SOP-16 / TSSOP-16
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Copyright © 2015 Unisonic Technologies Co., LTD
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QW-R502-013.F
4052
PIN CONFIGURATION
CMOS IC
PIN DESCRIPTION
PIN No.
SYMBAL
NAME AND FUNCTION
13, 3
X,Y
Commons Input/Output
6
INH
Inhibit Input
7
V
EE
Supply Voltage
8
V
SS
Ground
10,9
A,B
Binary Control Inputs
12,14,15,11
X0~X3
X Channel Inputs/Outputs
1,5,2,4
Y0~Y3
Y Channel Inputs/Outputs
16
V
DD
Positive Supply Voltage
Note: Control Inputs referenced to V
SS.
Analog Inputs and Outputs reference to V
EE.
V
EE
must be
＜V
SS.
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QW-R502-013.F
4052
ABSOLUTE MAXIMUM RATING
SYMBOL
V
DD
RATINGS
-0.5 ~ +18
PARAMETER
DC Supply Voltage (Referenced to V
EE
, V
SS
≧V
EE
)
CMOS IC
UNIT
V
Input or Output Voltage (DC or Transient)
V
IN
, V
OUT
-0.5 ~ V
DD
+0.5
V
(Referenced to V
SS
for Control Inputs and V
EE
for Switch I/O)
Input Current (DC or Transient), per Control Pin
I
IN
±10
mA
Switch Through Current
I
SW
±25
mA
700
mW
Power Dissipation
P
D
Derating above 65°C
7
mW/°C
Junction Temperature
T
J
125
°C
Operating Temperature
T
OPR
-40 ~ +125
°C
Storage Temperature
T
STG
-40 ~ +150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
ELECTRICAL CHARACTERISTICS
(T
A
=25°C, unless otherwise specified.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNIT
SUPPLY REQUIREMENTS (Voltages Referenced to V
EE
)
Power Supply Voltage Range
V
DD
V
DD
– 3
≧
V
SS
≧
V
EE
3
18
V
V
DD
=5V
0.005
5
µA
Control Inputs: V
IN
= V
SS
or V
DD
Quiescent
Current
per
I
Q
V
DD
=10V
Switch I/O: V
EE
≦
V
I/O
≦
V
DD
,
0.010
10
µA
Package
and
∆V
SW
≦
500mV(Note 2)
V
DD
=15V
0.015
20
µA
(0.07 µA/kHz) f + I
Q
µA
Total
Supply
Current V
DD
=5V
T
A
=25°C only (The channel
(Dynamic Plus Quiescent, V
DD
=10V
I
D(AV)
component, (V
IN
-V
OUT
)/R
ON
,
(0.20 µA/kHz) f + I
Q
µA
Per Package)
is excluded.)
V
DD
=15V
(0.36 µA/kHz) f + I
Q
µA
SWITCHES IN/OUT AND COMMONS OUT/IN -- X, Y, Z (Voltages Referenced to V
EE
)
Recommended Peak to Peak Voltage
V
I/O
Channel On or Off
0
V
DD
V
PP
Into or Out of the Switch
Recommended Static or Dynamic
∆V
SW
Channel On
0
600 mV
Voltage Across the Switch (Note2)
Output Offset Voltage
V
O(OFF)
V
IN
= 0V, No Load
10
µV
250
1050
Ω
V
DD
=5V
∆V
SW
≦
500mV (Note2)
R
ON
V
IN
= V
IL
or V
IH
(Control), and
ON Resistance
V
DD
=10V
120
500
Ω
V
IN
= 0 to V
DD
(Switch)
V
DD
=15V
80
280
Ω
25
70
Ω
∆ON
Resistance Between V
DD
=5V
Any Two Channels in the V
DD
=10V
∆R
ON
10
50
Ω
Same Package
V
DD
=15V
10
45
Ω
V
IN
= V
IL
or V
IH
(Control) Channel to
Channel or Any One Channel,
Off Channel Leakage Current
I
OFF
±0.05
±100 nA
V
DD
=15V
Capacitance, Switch I/O
C
I/O
Inhibit = V
DD
10
pF
Capacitance, Common O/I
C
O/I
Inhibit = V
DD
17
pF
Pins Not Adjacent
0.15
Capacitance, Feedthrough
C
I/O
pF
(Channel Off)
Pins Adjacent
0.47
CONTROL INPUTS – INHIBIT A, B, C (Voltages Referenced to V
SS
)
V
DD
=5V
2.25
1.5
V
V
IL
Low Level Input Voltage
V
DD
=10V
R
ON
= per spec, I
OFF
= per spec
4.50
3.0
V
V
DD
=15V
6.75
4.0
V
V
DD
=5V
3.5
2.75
V
High Level Input Voltage
V
DD
=10V
V
IH
R
ON
= per spec, I
OFF
= per spec
7.0
5.50
V
V
DD
=15V
11
8.25
V
Input Leakage Current
I
LEAK
V
IN
= 0 or V
DD
, V
DD
=15V
±0.00001 ±0.1 µA
Input Capacitance
C
IN
5.0
7.5
pF
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QW-R502-013.F
4052
DYNAMIC ELECTRICAL CHARACTERISTICS
V
DD
-V
EE
V
DC
5
10
15
5
10
15
5
10
15
10
(C
L
= 50pF, T
A
=25°C, V
EE
≦V
SS
, unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
t
PLH
, t
PHL
=(0.17 ns/pF)C
L
+ 21.5ns
t
PLH
, t
PHL
=(0.08 ns/pF)C
L
+ 8.0ns
t
PLH
, t
PHL
=(0.06 ns/pF)C
L
+ 7.0ns
(R
L
=10kΩ, V
EE
=V
SS
)
Output “1” or “0” to High Impedance,
or High Impedance to “1” or “0” Level
R
L
= 10 kΩ, V
EE
= V
SS
MIN
TYP
30
12
10
300
155
125
325
130
90
0.07
CMOS IC
MAX
75
30
25
600
310
250
650
260
180
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
Propagation Delay Times
Switch Input to Switch t
PLH,
t
PHL
Output (R
L
= 10 kΩ)
Inhibit to Output
t
PHZ,
t
PLZ
t
PZH,
t
PZL
t
PLH,
t
PHL
THD
Control Input to Output
Total Harmonic Distortion
R
L
= 10KΩ, f = 1 kHz, V
IN
= 5 V
PP
R
L
= 1kΩ, V
IN
= 1/2 (V
DD
–V
EE
) p–p,
17
MHz
Bandwidth
BW
10
C
L
= 50pF, 20 Log (V
OUT
/V
IN
) = -3dB)
R
L
=1KΩ, V
IN
= 1/2 (V
DD
–V
EE
) p–p
Off Channel Feedthrough
10
-50
dB
Attenuation
f
IN
= 30MHz
R
L
= 1kΩ, V
IN
= 1/2 (V
DD
–V
EE
) p–p
-50
dB
Channel Separation
10
f
IN
= 3MHz
R
1
= 1kΩ, R
L
= 10kΩ Control
Crosstalk, Control Input to
10
75
mV
Common O/I
t
TLH
= t
THL
= 20ns, Inhibit = V
SS
Notes: 1. Data of “TYP” is intended as an indication of the IC’s potential performance.
2. For voltage drops across the switch(∆V
SW
)>600mV (>300mV at high temperature), excessive V
DD
current
may be drawn, i.e. the current out of the switch may contain both V
DD
and switch input components. The
reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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QW-R502-013.F
4052
CMOS IC
TEST CIRCUIT
V
DD
IN/OUT
V
DD
V
DD
OUT/IN
V
EE
V
DD
LEVEL
CONVERTED
CONTROL
IN/OUT
OUT/IN
V
EE
Switch Circuit Schematic
CONTROL
TRUTH TABLE
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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QW-R502-013.F
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