STC89Cxx series MCU
STC89LExx series MCU
Data Sheet
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CONTENTS
Chapter 1 Introduction ......................................................................4
1.1
1.2
1.3
1.4
1.5
Features ................................................................................................. 4
Block diagram ...................................................................................... 5
Pin Configurations .............................................................................. 6
Pin Descriptions ................................................................................... 7
Pin Package Drawings ......................................................................... 8
Chapter 2 POWER MANAGENMENT, RESET ........................ 11
2.1 Power Management .......................................................................... 11
2.1.1 Idle Mode.....................................................................................................11
2.1.2 Power Down (PD) Mode ............................................................................12
2.2 RESET Control .................................................................................. 16
2.2.1 Reset pin ......................................................................................................16
2.2.2 Power-On Reset (POR).............................................................................. 17
2.2.3 Watch-Dog-Timer .......................................................................................17
2.2.4 Software RESET.........................................................................................20
2.2.5 MAX810 power-on-reset delay ..................................................................20
Chapter 3 Memory Organization ...................................................21
3.1 Program Memory............................................................................... 21
3.2 Data Memory...................................................................................... 22
3.2.1 On-chip Scratch-Pad RAM .......................................................................22
3.2.2 Auxiliary RAM ...........................................................................................22
3.2.3 External RAM.............................................................................................22
3.2.4 Special Function Register for RAM ..........................................................23
Chapter 4 Configurable I/O Ports
Configurations............................ 29
4.1 Quasi-bidirectional I/O....................................................................... 29
4.2 Push-pull Output................................................................................. 30
4.3 Input-only Mode ................................................................................. 30
4.4 Open-drain Output ............................................................................. 30
Chapter 5 Instruction System .........................................................31
5.1
5.2
5.3
5.4
Special Function Registers ................................................................ 31
Addressing Modes .............................................................................. 36
Instruction Set Summary .................................................................. 37
Instruction Definitions ....................................................................... 41
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Chapter 6 Interrupt .........................................................................78
6.1
6.2
6.3
6.4
6.5
6.6
Interrupt Structure ............................................................................ 79
Interrupt Register .............................................................................. 80
Interrupt Priorities ............................................................................ 84
How Interrupts Are Handled ............................................................ 84
External Interrupts ........................................................................... 85
Response Time ................................................................................... 88
Chapter 7 Timer/Counter................................................................89
7.1 Timer/Counter 0 Mode of Operation............................................... 92
7.2 Timer/Counter 1 Mode of Operation............................................... 95
7.3 Timer/Counter 2 Mode of Operation ............................................. 100
Chapter 8 UART with enhanced function ...................................109
8.1
8.2
8.3
8.4
8.5
9.1
9.2
9.3
9.4
UART Mode of Operation ............................................................... 112
Frame Error Detection .................................................................... 118
Multiprocessor Communications.................................................... 118
Automatic Address Recognition...................................................... 120
Buad Rates ........................................................................................ 122
IAP / ISP Control Register .............................................................. 123
STC89xx series internal EEPROM Selection Table ..................... 125
IAP/EEPROM Assembly Language Program Introduction ........ 126
Operating internal EEPROM Demo by Assembly Language ..... 128
Chapter 9 IAP / EEPROM ............................................................123
Appendix A: Assembly Language Programming ........................132
Appendix B: 8051 C Programming ..............................................154
Appendix C: STC89xx series Selection Table..............................164
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Chapter 1 Introduction
STC89xx series, which is produced by STC MCU Limited, is a 8-bit single-chip microcontroller with a fully
compatible instruction set with industrial-standard 80C51 series microcontroller. There is 64K bytes flash
memory embeded for appliaction program, which is shared with In-System-Programming code.In-System-
Programming (ISP) and In-Application-Programming (IAP) support the users to upgrade the program and data
in system. ISP allows the user to download new code without removing the microcontroller from the actual end
product;IAP means that the device can write non-valatile data in Flash memory while the application program
is running. There are 1280 bytes or 512 bytes on-chip RAM embedded that provides requirement from wide
field application. The user can configure the device to run in 12 clocks per machine cycle, and to get the same
performance just as he uses another standard 80C51 device that is provided by other vendor, or 6 clocks per
machine cycle to achieve twice performance. The STC89xx series retain all features of the standard 80C51. In
addition, the STC89xx series have a extra I/O port (P4 ), Timer 2, a 8-sources, 4-priority-level interrupt structure,
on-chip crystal oscillator,and a one-time enabled Watchdog Timer.
1.1 Features
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Enhanced 80C51 Central Processing Unit ,6T or 12T per machine cycle
Operation voltage range: 5.5V~3.3V (STC89C series) or 2.0V~ 3.6V (STC89LE series)
Operation frequency range: 0- 48MHz@12T, or 0-24MHz@6T
On-chip 4/8/13/16/20/32/64K FLASH program memory with flexible ISP/IAP capability
On-chip 1280 byte / 512 byte RAM
Be capable of addressing up to 64K byte of external RAM
Be capable of addressing up to 64K bytes external memory
Dual Data Pointer (DPTR) to speed up data movement
Three 16-bit timer/counter, Timer 2 is an up/down counter with programmable clcok output on P1.0
8 vector-address, 4 level priority interrupt capability
One enhanced UART with hardware address-recognition, frame-error detection function, and with self baud-
rate generator.
One 15 bits Watch-Dog-Timer with 8-bit pre-scaler (one-time-enabled)
integrate MAX810 — specialized reset circuit
Three power management modes: idle mode and power-down mode
Low EMI: inhibit ALE emission
Power down mode can be woken-up by INT0/P3.2 pin, INT1/P3.3 pin, T0/P3.4, T1/P3.5, RXD/P3.0 pin,
INT2/P4.3, INT3/P4.2
Maximum 39 programmable I/O ports are available
Four 8-bit bi-directonal ports; extra four-bit additional P4 are available for PLCC-44 and LQFP-44
Operating temperature: -40 ~ +85
o
C (industrial) / 0~75
o
C (commercial)
package type :PQFP-44,LQFP-44,PDIP-40,PLCC-44
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1.2 Block diagram
The CPU kernel of STC89xx series are fully compatible to the standard 8051 microcontroller, maintains all
instruction mnemonics and binary compatibility. STC89xx series can execute the fastest instructions per 6 clock
cycles or 12 clock cycles(as the same as the standard 80C51) . Improvement of individual programs depends on
the actual instructions used.
AUX-RAM
1024 Byte
RAM ADDR
Register
256 Byte
RAM
B Register
ACC
Stack
Poniter
TMP2
TMP1
Timer 0/1
Timer 2
ALU
PSW
WDT
UART
FLASH
64K
ISP/IAP
Address
Generator
Program
Counter
PSEN
ALE
EA
RESET
Control
Unit
XTAL1
XTAL2
Port 0,1,2,3,4
Latch
Port 0,1,2,3,4
Driver
P0, P1,P2,P3,P4
STC89xx Block Diagram
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