SC8102A DATASHEET
SOUTHCHIP CONFIDENTIAL
Dual-Ouputs 6-A Buck Converter with Integrated DCP Scheme
1
Description
2
Features
Wide input operating voltage from 5V to 36V
11mΩ/27mΩ Low Rdson Internal Power MOSFETs
Max output capacity with 5V/6A
100% duty cycle operation
Low quiescent current
Programmable output power limit
Build-in DP/DM for USB DCP modes:
-
BC1.2 DCP Mode
Divider Mode
1.2V/1.2V Mode
The SC8102A is a synchronous dual-output ports buck
converter with a wide input voltage from 5V to 36V. The
SC8102A regulates the output voltage at a fixed 5V or
customized voltage by setting the divider resistor. It
also provides high accurate output current limit. The
converter enters Constant Current (CC) Mode in case
any of the two output channels reaches the setting
current
limit.
The
total
output
power
can
be
programmed by a resistor, which makes it easy for
constant power control.
The SC8102A adopts fixed line drop compensation,
programmable frequency setting and PWM/PFM mode
operation. It also integrates automatic DCP mode and
Type-C current mode, so that a USB controller can be
saved. With minimum external components, maximum
functions
can
be
achieved
for
user’s
different
-
-
Build-in USB Type-C 3A current mode
Integrated NMOS gate driver
Build-in line drop compensation
PFM/PWM mode selection
Adjustable frequency 80kHz to 600kHz
Hiccup and auto-restart
Full protection of UVLO, OVP, OCP, OTP
applications.
The SC8102A also supports full protections including
under voltage protection, over voltage protection, short
current protection and auto-restart, over temperature
protection.
The SC8102A adopts 32 pin QFN 5x5 package.
3
Applications
Car Charger
Multi-Ports Wall Charger
Hub
Industrial applications
4
Device Information
PACKAGE
32 pin QFN
BODY SIZE
5 mm x 5 mm x 0.75 mm
SC8102AQDJR
ORDER NUMBER
Copyright © 2017, Southchip Semiconductor Technology (Shanghai) Co.,Ltd
Please contact
application@southchip.com
for more information.
SC8102A DATASHEET
SOUTCHIP CONFIDENTIAL
SOUTHCHIP SEMICONDUCTOR TECHNOLOGY (SHANGHAI) CO.,LTD
5
Typical Application Circuit
VIN=6-36V
VIN
100uF
0.1uF
10uF
FREQ
SNS2P
SNSN
SNS1P
PWR
MODE
FB
NDRV
NSRC
DP
DM
20m
Ω
SNSN SNS1P
NMOS
47k
Ω
56k
Ω
BOOT
0.1uF
SW
VOUT
L
0.1uF
220uF
VOUT=5V
VBUS
DP
SC8102A
DM
GND
USB-A
5V/2.4A
VBUS
DP1
DM1
DP2
DM2
USB
Type-C
5V/3A
PGND
AGND
VCC
1uF
CC1
CC2
16m
Ω
SNSN SNS2P
CC1
CC2
GND
Figure.1 Typical Application Circuit with Dual-Outputs and Isolated NMOS
0.1uF
VIN
100uF
0.1uF
10uF
FREQ
SNS2P
SNSN
SNS1P
PWR
NMOS
MODE
FB
NDRV
NSRC
DP
DM
20m
Ω
SNSN SNS1P
NMOS
47k
Ω
56k
Ω
BOOT
SW
VOUT
L
0.1uF
220uF
VOUT=5V
VIN=6-36V
VBUS
DP
SC8102A
DM
GND
USB-A
5V/2.4A
VBUS
DP1
DM1
DP2
DM2
CC1
CC2
USB
Type-C
5V/3A
VCC
1uF
PGND
AGND
CC1
CC2
16m
Ω
SNSN SNS2P
GND
Figure.2 Typical Application Circuit with Dual-Outputs and Back-to-Back Isolated NMOS
2
Please contact
application@southchip.com
for more information.
Copyright © 2017, Southchip Semiconductor Technology (Shanghai) Co., Ltd.
SC8102A DATASHEET
SOUTHCHIP SEMICONDUCTOR TECHNOLOGY (SHANGHAI) CO.,LTD
SOUTHCHIP CONFIDENTIAL
6
Terminal Configuration and Functions
32 VCC
31 VIN
30 VIN
29 VIN
27 SW
26 SW
28 SW
25 SW
24 PGND
23 PGND
22 PGND
VIN
SW
21 PGND
20 PGND
19 SW
18 BOOT
17 VOUT
DP
DM
CC1
CC2
NDRV
NSRC
PWR
SNS1P
1
2
3
4
5
6
7
8
MODE 12
FREQ 13
FB 14
AGND 15
QFN 32 Package Reference
(Top View)
TERMINAL
I/O
NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
NAME
DP
DM
CC1
CC2
NDRV
NSRC
PWR
SNS1P
SNSN
SNS2P
NC
MODE
I
I/O
I/O
I/O
I/O
O
O
I
I
I
I
D+ data line to USB connector 2, used for hand-shaking with portable devices.
D- data line to USB connector 2, used for hand-shaking with portable devices.
Configuration Channel 1 to USB Type-C connector.
Configuration Channel 2 to USB Type-C connector.
Gate signal for isolated Type-C NMOS
Source signal for isolated Type-C NMOS
Output power limit pin. Setting the output power limit by connecting a resistor to GND
Positive end of output 1 current sense amplifier.
Negative end of output current sense amplifier.
Positive end of output 2 current sense amplifier.
Floating.
Mode selection pin. Logic high level sets the device working in PWM mode; logic low level or
floating sets the device working in PFM mode.
The operation frequency is programmed by a resistor between this pin and AGND.
13
FREQ
I
Leaving this pin floating sets the device working in 120kHz.
DESCRIPTION
SNS2P 10
SNSN 9
SW 16
NC 11
Copyright © 2017, Southchip Semiconductor Technology (Shanghai) Co., Ltd.
Please contact
application@southchip.com
for more information
3
SC8102A DATASHEET
SOUTCHIP CONFIDENTIAL
SOUTHCHIP SEMICONDUCTOR TECHNOLOGY (SHANGHAI) CO.,LTD
Output voltage feedback. Connect the center of two divider resistor to program the output voltage.
14
FB
I
O
utput voltage be configured for fixed 5.1V with FB pin connected to GND.
15
17
18
16, 19, 25,
26, 27, 28
20~24
29, 30, 31
32
AGND
VOUT
BOOT
I/O
I
PWR
Analog Ground.
Output node of the Buck.
Connect a capacitor between BT and SW to bootstrap a voltage to provide the bias for high side
MOSFET driver.
Switching node.
Power ground.
Input node of Buck. Connect a 10 µF ceramic capacitor from VIN to PGND pin.
Output of internal regulator to provide 5.2V voltage for the bias voltage of internal gate drivers.
Connect a 1 µF ceramic capacitor from VCC to PGND pin.
SW
PGND
VIN
VCC
PWR
PWR
I
PWR
4
Please contact
application@southchip.com
for more information.
Copyright © 2017, Southchip Semiconductor Technology (Shanghai) Co., Ltd.
SC8102A DATASHEET
SOUTHCHIP SEMICONDUCTOR TECHNOLOGY (SHANGHAI) CO.,LTD
SOUTHCHIP CONFIDENTIAL
7
7.1
Specifications
Absolute Maximum Ratings
(1)
Over operating free-air temperature range (unless otherwise noted)
MIN
VIN, VOUT, SNS1P, SNSN, SNS2P,
SW
Voltage range at
terminals
(2)
NDRV
FB, DP, DM, CC1, CC2, VCC, FREQ, MODE, NSRC, PWR
BOOT
Operating Junction, T
J
Temperature Range
Storage temperature range, T
stg
(1)
-65
-0.3
-1
-1
-0.3
-0.3
-40
MAX
42
42
10
6.5
50
150
150
UNIT
V
V
V
V
V
°
C
°
C
Stresses beyond those listed under
absolute maximum ratings
may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
recommended operating
conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
(2)
7.2
Handling Ratings
DEFINITION
Human body model (HBM) ESD stress voltage
(2)
for DP/DM pin
MIN
-8
-8
-2
-750
MAX
8
8
2
750
UNIT
kV
kV
kV
V
PARAMETER
ESD
(1)
Human body model (HBM) ESD stress voltage
(2)
for CC1/CC2 pin
Human body model (HBM) ESD stress voltage for other pins
Charged device model (CDM) ESD stress voltage
(3)
(1)
(2)
(3)
Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges
into the device.
Level listed above is the passing level per ANSI, ESDA, and JEDEC JS-001. JEDEC document JEP155 states that 500-V HBM allows
safe manufacturing with a standard ESD control process.
Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250-V CDM allows safe
manufacturing with a standard ESD control process.
7.3
Recommended Operating Conditions
MIN
TYP
MAX
36
5
30
80
6.8
100
220
10
16
80
-40
120
600
125
680
22
UNIT
V
V
µF
µF
µH
mΩ
kHz
C
V
IN
V
OUT
C
IN
C
OUT
L
R
SNS1/2
f
SW
T
J
Input voltage range
Output voltage range
Input Capacitance
Output capacitance
Inductance
Current Sensing Resistor
Operating frequency range
Operating junction temperature
6
Copyright © 2017, Southchip Semiconductor Technology (Shanghai) Co., Ltd.
Please contact
application@southchip.com
for more information
5