SC8002 DATASHEET
SOUTHCHIP SEMICONDUCTOR TECHNOLOGY (SHANGHAI) CO.,LTD
SOUTHCHIP CONFIDENTIAL
High Efficiency Buck Controller with Constant Power Limit
1
Description
2
Features
Wide input operating voltage from 4.6V to 36V
100% duty cycle operation
Low quiescent current
Programmable peak current limit
Programmable output power limit
PFM and PWM mode selection
Build-in line drop compensation
Adjustable frequency 80kHz to 600kHz
Hiccup and auto-restart
Full protection of UVLO, OVP, OCP, OTP
Available in QFN-20 3 x 3 Package
The SC8002 is a synchronous buck controller with a
wide input voltage from 4.6V to 36V. It can be
configured as dual-outputs or single output. The
SC8002 regulates the output voltage at a fixed 5V or
customized voltage by setting the divider resistor. It
also provides high accurate output current limit. The
SC8002 enters Constant Current (CC) Mode in case
any of the two output channels reaches the setting
current
limit.
The
total
output
power
can
be
programmed by a resistor, which makes it easy for
constant power control.
The SC8002 adopts frequency setting and operating
modes selection for PWM and PFM mode. With
minimum external components, maximum functions
can be achieved for user’s different applications.
The SC8002 also supports full protections including
under voltage protection, over voltage protection, short
current protection and auto-restart, over temperature
protection.
The SC8002 adopts 20 pin QFN 3 x 3 package.
3
Applications
Car Charger
Multi-Ports Wall Charger
Hub
Industrial applications
4
Device Information
PACKAGE
QFN20L
BODY SIZE
3 mm x 3 mm x 0.55 mm
SC8002QDKR
ORDER NUMBER
Copyright © 2017, Southchip Semiconductor Technology (Shanghai) Co.,Ltd
Please contact
application@southchip.com
for more information.
SC8002 DATASHEET
SOUTCHIP CONFIDENTIAL
SOUTHCHIP SEMICONDUCTOR TECHNOLOGY (SHANGHAI) CO.,LTD
5
Typical Application Circuit
VIN
10uF
1uF
SW
SNSN
SNS1P
M1
M2
L
VOUT1
LOAD1
VIN
ISNS1
EN
NC
ISNS2
VCC
HD
VOUT2
SW
SNSN
0.1uF
Cboot
SW
SNS2P
LOAD2
PGND
PGND
LD
BT
MODE
AGND
VOUT
PWR
SNS1P
SNSN
SNS1P
SNS2P
SNSN
FREQ
Figure.1 Typical Application Circuit with 5.05V Dual-Output
L
M2
1uF
SW
SNSN
SNSP
VOUT
LOAD
VIN
SNS2P
M1
VIN
ISNS1
FB
EN
NC
PWR
ISNS2
VCC
HD
SW
PGND
PGND
LD
BT
MODE
AGND
0.1uF
Cboot
SNSP
SNSN
SNS1P
SW
SNS2P
SNSN
VOUT
FREQ
Figure.2 Typical Application Circuit with Single-Outputs
2
Please contact
application@southchip.com
for more information.
FB
Copyright © 2017, Southchip Semiconductor Technology (Shanghai) Co., Ltd.
SC8002 DATASHEET
SOUTHCHIP SEMICONDUCTOR TECHNOLOGY (SHANGHAI) CO.,LTD
SOUTHCHIP CONFIDENTIAL
6
Terminal Configuration and Functions
VIN
ISNS2
AGND
ISNS1
VCC
HD
EN
NC
SW
PGND
PGND
LD
PWR
SNS1P
SNS2P
BT
MODE
SNSN
VOUT
FREQ
QFN 20 Package Reference
(Top View)
TERMINAL
I/O
NUMBER
1
2
3
4
5
6
7
NAME
EN
NC
PWR
SNS1P
SNSN
SNS2P
MODE
I
O
I
I
I
I
I
Enable logic input. Logic high level enables the device and logic low level disables the device.
Floating
Output power limit pin. Setting the input power limit by connecting a resistor to GND
Positive end of output 1 current sense amplifier.
Negative end of output current sense amplifier.
Positive end of output 2 current sense amplifier.
Mode selection pin. Logic high level sets the device working in PWM mode; logic low level sets the
device working in PFM mode.
The operation frequency is programmed by a resistor between this pin and AGND. Leaving this pin
floating sets the device working in 120kHz.
Output voltage feedback. Connect the center of two divider resistor to program the output voltage.
9
FB
I
DESCRIPTION
8
FREQ
I
O
utput voltage be configured for fixed 5.1V with FB pin connected to GND.
Analog Ground.
Output node of the Buck. Connect a 1 µF ceramic capacitor from VOUT to PGND pin.
Connect a capacitor between BT pin and SW pin to bootstrap a voltage to provide the bias voltage
for high side MOSFET gate driver.
Low side MOSFET gate driver output
Power ground.
10
11
12
13
14
AGND
VOUT
BT
LD
PGND
I/O
I
PWR
PWR
PWR
FB
Copyright © 2017, Southchip Semiconductor Technology (Shanghai) Co., Ltd.
Please contact
application@southchip.com
for more information
3
SC8002 DATASHEET
SOUTCHIP CONFIDENTIAL
SOUTHCHIP SEMICONDUCTOR TECHNOLOGY (SHANGHAI) CO.,LTD
15
16
17
18
19
20
SW
ISNS2
ISNS1
HD
VIN
VCC
PWR
I
I
PWR
I
PWR
Switching Node.
Negative end of input current sense amplifier.
Positive end of input current sense amplifier.
High side MOSFET gate driver output
Input node of the converter. Connect a 1 µF ceramic capacitor from VIN to PGND pin.
Output of internal regulator to provide 5.2V voltage for the bias voltage of internal gate drivers.
Connect a 1 µF ceramic capacitor from VCC to PGND pin.
4
Please contact
application@southchip.com
for more information.
Copyright © 2017, Southchip Semiconductor Technology (Shanghai) Co., Ltd.
SC8002 DATASHEET
SOUTHCHIP SEMICONDUCTOR TECHNOLOGY (SHANGHAI) CO.,LTD
SOUTHCHIP CONFIDENTIAL
7
7.1
Specifications
Absolute Maximum Ratings
(1)
Over operating free-air temperature range (unless otherwise noted)
MIN
VIN, VOUT, SNS1P, SNSN, SNS2P, EN, ISNS1, ISNS2
SW
Voltage range at
terminals
(2)
FB, VCC, MODE, FREQ, PWR, DET
BOOT
HD to SW, LD
Operating Junction, T
J
Temperature Range
Storage temperature range, T
stg
(1)
-65
-0.3
-1
-0.3
-0.3
-0.3
-40
MAX
42
42
6.5
50
12
150
150
UNIT
V
V
V
V
V
°
C
°
C
Stresses beyond those listed under
absolute maximum ratings
may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
recommended operating
conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
(2)
7.2
Handling Ratings
DEFINITION
Human body model (HBM) ESD stress voltage
(2)
for DP/DM pin
MIN
-8
-2
-750
MAX
8
2
750
UNIT
kV
kV
V
PARAMETER
ESD
(1)
Human body model (HBM) ESD stress voltage for other pins
Charged device model (CDM) ESD stress voltage
(3)
(1)
(2)
(3)
Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges
into the device.
Level listed above is the passing level per ANSI, ESDA, and JEDEC JS-001. JEDEC document JEP155 states that 500-V HBM allows
safe manufacturing with a standard ESD control process.
Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250-V CDM allows safe
manufacturing with a standard ESD control process.
7.3
Recommended Operating Conditions
MIN
TYP
MAX
36
36
100
220
10
150
22
600
125
UNIT
V
V
µF
µF
µH
kHz
C
V
IN
V
OUT
C
IN
C
OUT
L
f
SW
T
J
Input voltage range
Output voltage range
Input Capacitance
Output capacitance
Inductance
Operating frequency range
Operating junction temperature
4.6
3
30
80
2.2
80
-40
Copyright © 2017, Southchip Semiconductor Technology (Shanghai) Co., Ltd.
Please contact
application@southchip.com
for more information
5
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