®
RT3662AC
Dual-Output PWM Controller with 3 Integrated Drivers for
AMD SVI2 Mobile CPU Power Supply
General Description
The RT3662AC is a dual-output PWM controller with 3
integrated drivers, and it is compliant with AMD SVI2
Voltage Regulator Specification to support both CPU core
(VDD) and Northbridge portion of CPU (VDDNB). The
RT3662AC features CCRCOT (Constant Current Ripple
Constant On-Time) with G-NAVP (Green-Native AVP),
which is Richtek’ s proprietary topology. G-NAVP makes
it an easy setting controller to meet all AMD AVP (Adaptive
Voltage Positioning) VDD/VDDNB requirements. The droop
is easily programmed by setting the DC gain of the error
amplifier. With proper compensation, the load transient
response can achieve optimized AVP performance. The
controller also uses the interface to issue VOTF Complete
and to send digitally encoded voltage and current values
for the VDD/VDDNB domains. The RT3662AC can operate
in diode emulation mode to enhance the light load
efficiency. And it provides the current gain adjustment
capability by pin setting. The RT3662AC provides power
good indication, thermal indication (VRHOT_L), and it
features complete fault protection functions including over
current, over voltage and under voltage.
Features
2/1-Phase (VDD) + 1/0-Phase (VDDNB) PWM
Controller
3 Embedded MOSFET Drivers
G-NAVP
TM
Topology
Support Dynamic Load-Line and Zero Load-Line
Diode Emulation Mode at Light Load Condition
SVI2 Interface to Comply with AMD Power
Management Protocol
Adjustable Current Gain Capability
DVID Enhancement
0.5% DAC Accuracy
Differential Remote Voltage Sensing
Build-in ADC for Pin Setting Programming, Thermal
Indication and V
OUT
, I
OUT
Reporting
Fast Transient Response
Power Good Indicator
Thermal Indicator (VRHOT_L)
OVP, UVP and UVLO
Over Current Protection
Applications
Ordering Information
RT3662AC
Package Type
QW : WQFN-40L 5x5 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
½
AMD SVI2 Mobile CPU
Laptop Computer
Marking Information
RT3662ACGQW : Product Number
RT3662AC
GQW
YMDNN
YMDNN : Date Code
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
Simplified Application Circuit
RT3662AC
PHASE1
VRHOT_L
To CPU
SVC
SVD
SVT
PHASE2
PHASE_NB
MOSFET
MOSFET
MOSFET
V
VDDNB
V
VDD
½
Copyright
©
2017 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS3662AC-04 July 2017
www.richtek.com
1
RT3662AC
Pin Configuration
(TOP VIEW)
PHASE2
LGATE2
BOOT1
UGATE1
PHASE1
LGATE1
PVCC
LGATE_NB
PHASE_NB
UGATE_NB
40 39 38 37 36 35 34 33 32 31
UGATE2
BOOT2
PGOOD
RGND
COMP
FB
ISEN2P
VSEN
ISEN1P
ISEN1N
1
2
3
4
5
6
7
8
9
10
11 12 13 14 15 16 17 18 19 20
41
30
29
28
27
26
25
24
23
22
21
GND
BOOT_NB
EN
VIN
COMP_NB
FB_NB
ISENP_NB
ISENN_NB
TSEN_NB
VDDIO
SVT
Functional Pin Description
Pin No
1
2
3
4
5
6
7
8
9
10
11
12
Pin Name
UGATE2
BOOT2
PGOOD
RGND
COMP
FB
ISEN2P
VSEN
ISEN1P
ISEN1N
VRHOT_L
TSEN
Pin Function
Upper gate driver output of Phase 2 for VDD controller. Connect this pin to the
gate input of high side MOSFET.
Bootstrap supply of VDD controller for Phase 2 high side MOSFET. This pin
powers high side MOSFET driver.
Power good indicator for the VDD and VDDNB controller. This pin is an open
drain output.
Return ground of VDD and VDDNB controllers. This pin is the common negative
input of output voltage differential remote sense of VDD and VDDNB controllers.
Error amplifier output pin of the VDD controller.
Output voltage feedback input of VDD controller. This pin is the negative input of
the error amplifier for the VDD controller.
Positive current sense input of Phase 2 for VDD controller.
VDD controller voltage sense input. This pin is connected to the terminal of VDD
controller output voltage.
Positive current sense input of Phase 1 for VDD controller.
Common negative current sense input of Phase1 and Phase 2 for VDD
controller.
Thermal indicator. This pin is an open drain output. (Active low)
This pin provides two functions: platform setting, platform can use this pin to set
frequency of VDD and VDDNB controllers, initial offset and per-phase OCP
threshold of VDD controller. The other function is thermal sense input for
VRHOT indicator. Connect the NTC network for thermal sensing to this pin.
Copyright
©
2017 Richtek Technology Corporation. All rights reserved.
VRHOT_L
TSEN
SET1
IMON
VREF_PINSET
IMON_NB
VCC
PWROK
SVC
SVD
WQFN-40L 5x5
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
2
DS3662AC-04 July 2017
RT3662AC
Pin No
13
14
Pin Name
SET1
IMON
Pin Function
Platform setting pin. Platform can use this pin to set the Ai gain of VDD and
VDDNB controllers, VDDNB voltage reporting compensation bit1 to bit3 and
VDD Controller QRTH.
Current monitor output for the VDD controller. This pin outputs a voltage
proportional to the output current.
This pin provides two functions: The 3.2V power supply for pin setting function
divided resistors. The other function is fixed 0.8V output reference voltage,
and the voltage is only used to offset the output voltage of IMON and
IMON_NB pins. Connect a RC circuit from this pin to GND. The recommended
resistor is from 3.9 to 10, and the capacitor is 0.47F.
Current monitor output for the VDDNB controller. This pin outputs a voltage
proportional to the output current.
Controller power supply. Connect this pin to 5V and place a decoupling
capacitor 2.2F at least. The decoupling capacitor is as close controller as
possible.
System power good input. If PWROK is low, the SVI interface is disabled and
VR returns to BOOT-VID state with initial load-line slope and initial offset. If
PWROK is high, the SVI interface is running and the DAC decodes the
received serial VID codes to determine the output voltage.
Serial VID clock input.
Serial VID data input. This pin is a serial data line.
Serial VID telemetry output from VR. This pin is a push-pull output.
Processor memory interface power rail and serves as the reference for
PWROK, SVD, SVC and SVT. This pin is used by the VR to reference the SVI
pins.
This pin provides two functions: platform setting, platform can use this pin to
set initial offset, BOOT VID, voltage reporting compensation bit0 and per-
phase OCP threshold of VDDNB controller. The other function is thermal
sense input for VRHOT indicator. Connect the NTC network for thermal
sensing to this pin.
Negative current sense input for VDDNB controller.
Positive current sense input for VDDNB controller.
Output voltage feedback input of VDDNB controller. This pin is the negative
input of the error amplifier for the VDDNB controller.
Error amplifier output pin of the VDDNB controller.
VIN input pin. Connect a low pass filter to this pin.
Controller enable input pin.
Bootstrap supply of VDDNB controller for high side MOSFET. This pin powers
high side MOSFET driver.
Upper gate driver output of VDDNB controller. Connect this pin to the gate
input of high side MOSFET.
Switch nodes of high side driver for VDDNB controller. Connect this pin to
high side MOSFET source together with the low side MOSFET drain and the
inductor.
Lower gate driver output of VDDNB controller. Connect this pin to the gate
input of low side MOSFET.
Driver power supply. Connect this pin to GND by the 2.2F ceramic capacitor
at least. The decoupling capacitor is as close controller as possible.
is a registered trademark of Richtek Technology Corporation.
15
VREF_PINSET
16
17
IMON_NB
VCC
18
19
20
21
22
PWROK
SVC
SVD
SVT
VDDIO
23
TSEN_NB
24
25
26
27
28
29
30
31
32
33
34
ISENN_NB
ISENP_NB
FB_NB
COMP_NB
VIN
EN
BOOT_NB
UGATE_NB
PHASE_NB
LGATE_NB
PVCC
Copyright
©
2017 Richtek Technology Corporation. All rights reserved.
DS3662AC-04 July 2017
www.richtek.com
3
RT3662AC
Pin No
35
36
37
38
39
40
41
(Exposed Pad)
Pin Name
LGATE1
PHASE1
UGATE1
BOOT1
LGATE2
PHASE2
GND
Pin Function
Lower gate driver output of Phase 1 for VDD controller. Connect this pin to
the gate input of low side MOSFET.
Phase 1 switch nodes of high side driver for VDD controller. Connect this pin
to high side MOSFET source together with the low side MOSFET drain and
the inductor.
Upper gate driver output of Phase 1 for VDD controller. Connect this pin to
the gate input of high side MOSFET.
Bootstrap supply of VDD controller for Phase 1 high side MOSFET. This pin
powers high side MOSFET driver.
Lower gate driver output of Phase 2 for VDD controller. Connect this pin to
the gate input of low side MOSFET.
Phase 2 switch nodes of high side driver for VDD controller. Connect this pin
to high side MOSFET Source together with the low side MOSFET drain and
the inductor.
Ground. The exposed pad must be soldered to a large PCB and connected
to GND for maximum power dissipation.
Copyright
©
2017 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
4
DS3662AC-04 July 2017
RT3662AC
Functional Block Diagram
VRHOT_L
TSEN_NB
PWROK
PGOOD
VSEN
VDDIO
SET1
TSEN
VCC
UVLO
GND
Loop Control
Protection
Logic
SVC
SVD
SVT
ISENN_NB
MUX
SVI2 Interface
Configuration Registers
Control Logic
From Control Logic
ADC
IMONI_NB
IMONI
RGND
DAC
ERROR
AMP
AI_VDD, AI_VDDNB
QR_TH
TONSET
OFFSET
PHOCP_TH
VDDNB Voltage
Reporting Compensation
EN
Soft Start &
Slew Rate Control
FB
COMP
VSET
+
-
VIN
Offset
Cancellation
+
+
-
PWM
CMP
QR_TH
PWM1
TON
GEN
PWM2 Driver
BOOTx
UGATEx
PHASEx
LGATEx
1.867m
ISEN1P
ISEN1N
+
-
1.867m
ISEN2P
+
-
IMON
VREF_PINSET
From Control Logic
+
RGND
DAC
VSET_NB
+
-
FB_NB
COMP_NB
1.867m
ISENP_NB
ISENN_NB
+
-
+
VREF_PINSET
IMON_NB
-
IMONI_NB
ISENN_NB
0.75 x AI_VDDNB
ERROR
AMP
OCP_SPIKE
-
OC
IMONI
OV/UV
IB2
VSEN
+
-
IB1
0.75 x AI_VDD
RAMP
TONSET
Current
Balance
Driver
POR
IB1
IB2
PVCC
To Protection Logic
VIN
PWM
CMP
PWM
_NB
BOOT_NB
Driver
UGATE_NB
PHASE_NB
LGATE_NB
Soft Start&
Slew Rate Control
Offset
Cancellation
+
+
-
TON
GEN
TONSET
RAMP
OV/UV
+
OC_NB
OCP_SPIKE_NB
-
To Protection Logic
Copyright
©
2017 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS3662AC-04 July 2017
www.richtek.com
5
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