MX25L3236FM2I-08Q

MX25L3236F

MX25L3236F

3V, 32M-BIT [x 1/x 2/x 4]

CMOS MXSMIO

®

(SERIAL MULTI I/O)

FLASH MEMORY

Key Features

• Special Block Protection Levels

• Hold Feature

• Multi I/O Support - Single I/O, Dual I/O and Quad I/O

• Auto Erase and Auto Program Algorithms

• Program Suspend/Resume & Erase Suspend/Resume

P/N: PM2278

1

Rev. 1.2, November 22, 2016

MX25L3236F

Contents

1. FEATURES ........................................................................................................................................................ 4

2. GENERAL DESCRIPTION ............................................................................................................................... 5

3. PIN CONFIGURATION ...................................................................................................................................... 6

4. PIN DESCRIPTION ............................................................................................................................................ 6

5. BLOCK DIAGRAM............................................................................................................................................. 7

6. DATA PROTECTION.......................................................................................................................................... 8

Table 1. Protected Area Sizes ................................................................................................................9

Table 2. 4K-bit Secured OTP Definition

...............................................................................................10

7. MEMORY ORGANIZATION ..............................................................................................................................11

Table 3. Memory Organization

............................................................................................................. 11

8. DEVICE OPERATION ...................................................................................................................................... 12

9. HOLD FEATURE.............................................................................................................................................. 13

10. COMMAND DESCRIPTION ........................................................................................................................... 15

Table 4. Command Sets

.......................................................................................................................15

10-1. Write Enable (WREN)

..........................................................................................................................18

10-2. Write Disable (WRDI)

...........................................................................................................................19

10-3. Read Identification (RDID)

...................................................................................................................20

10-4. Read Status Register (RDSR)

.............................................................................................................21

10-5. Read Configuration Register (RDCR)

..................................................................................................22

Table 5. Status Register

.......................................................................................................................23

Table 6. Configuration Register

............................................................................................................24

Table 7. Dummy Cycle and Frequency Table

.......................................................................................24

10-6. Write Status Register (WRSR)

.............................................................................................................25

Table 8. Protection Modes

....................................................................................................................26

10-7. Read Data Bytes (READ)

....................................................................................................................28

10-8. Read Data Bytes at Higher Speed (FAST_READ)

..............................................................................29

10-9. Dual Read Mode (DREAD)

..................................................................................................................30

10-10. 2 x I/O Read Mode (2READ)

...............................................................................................................31

10-11. Quad Read Mode (QREAD)

................................................................................................................32

10-12. 4 x I/O Read Mode (4READ)

...............................................................................................................33

10-13. Performance Enhance Mode

...............................................................................................................35

10-14. Burst Read

...........................................................................................................................................36

10-15. Sector Erase (SE)

................................................................................................................................37

10-16. Block Erase (BE)

.................................................................................................................................38

10-17. Block Erase (BE32K)

...........................................................................................................................39

10-18. Chip Erase (CE)

...................................................................................................................................40

10-19. Page Program (PP)

.............................................................................................................................41

10-20. 4 x I/O Page Program (4PP)

................................................................................................................42

10-21. Deep Power-down (DP)

.......................................................................................................................45

10-22. Release from Deep Power-down (RDP), Read Electronic Signature (RES)

.......................................46

10-23. Read Electronic Manufacturer ID & Device ID (REMS)

.......................................................................48

Table 9. ID Definitions

.........................................................................................................................49

10-24. Enter Secured OTP (ENSO)

................................................................................................................49

10-25. Exit Secured OTP (EXSO)

...................................................................................................................49

10-26. Read Security Register (RDSCUR)

.....................................................................................................50

Table 10. Security Register Definition

..................................................................................................51

10-27. Write Security Register (WRSCUR)

.....................................................................................................52

10-28. Program Suspend and Erase Suspend

...............................................................................................53

P/N: PM2278

Rev. 1.2, November 22, 2016

2

MX25L3236F

Table 11. Readable Area of Memory While a Program or Erase Operation is Suspended

..................53

Table 12. Acceptable Commands During Program/Erase Suspend after tPSL/tESL

...........................53

Table 13. Acceptable Commands During Suspend (tPSL/tESL not required)

......................................54

10-29. Program Resume and Erase Resume

.................................................................................................55

10-30. No Operation (NOP)

............................................................................................................................56

10-31. Software Reset (Reset-Enable (RSTEN) and Reset (RST))

...............................................................56

10-32. Read SFDP Mode (RDSFDP)

..............................................................................................................57

Table 14. Signature and Parameter Identification Data Values

...........................................................58

Table 15. Parameter Table (0): JEDEC Flash Parameter Tables

.........................................................59

Table 16. Parameter Table (1): Macronix Flash Parameter Tables

......................................................61

11. POWER-ON STATE ....................................................................................................................................... 63

12. Electrical Specifications

.............................................................................................................................. 64

12-1. Absolute Maximum Ratings

.................................................................................................................64

12-2. Capacitance TA = 25°C, f = 1.0 MHz

...................................................................................................64

Table 17. DC Characteristics

................................................................................................................66

Table 18. AC Characteristics

................................................................................................................67

13. TIMING ANALYSIS ........................................................................................................................................ 69

14. OPERATING CONDITIONS ........................................................................................................................... 71

Table 19. Power-Up/Down Voltage and Timing

....................................................................................73

14-1. Initial Delivery State

.............................................................................................................................73

15. ERASE AND PROGRAMMING PERFORMANCE ........................................................................................ 74

16. DATA RETENTION ........................................................................................................................................ 74

17. LATCH-UP CHARACTERISTICS .................................................................................................................. 74

18. ORDERING INFORMATION .......................................................................................................................... 75

19. PART NAME DESCRIPTION ......................................................................................................................... 76

20. PACKAGE INFORMATION ............................................................................................................................ 77

20-1. 8-pin SOP (200mil)

..............................................................................................................................77

21. REVISION HISTORY ..................................................................................................................................... 78

P/N: PM2278

3

Rev. 1.2, November 22, 2016

MX25L3236F

32M-BIT [x 1 / x 2 / x 4] CMOS MXSMIO

®

(SERIAL MULTI I/O)

FLASH MEMORY

1. FEATURES

GENERAL

• Supports Serial Peripheral Interface -- Mode 0 and

Mode 3

•

33,554,432 x 1 bit structure or 16,777,216 x 2 bits (two

I/O read mode) structure or 8,388,608 x 4 bits

(four I/O mode) structure

• 1024 Equal Sectors with 4K bytes each

- Any Sector can be erased individually

• 128 Equal Blocks with 32K bytes each

- Any Block can be erased individually

• 64 Equal Blocks with 64K bytes each

- Any Block can be erased individually

• Power Supply Operation

- 2.65 ~ 3.6 volt for read, erase, and program op-

erations

• Latch-up protected to 100mA from -1V to Vcc +1V

PERFORMANCE

• High Performance

VCC = 2.65~3.6V

- Normal read

- 50MHz

- Fast read

- FAST_READ, DREAD, QREAD: 133MHz with

8 dummy cycles

- 2READ: 104MHz with 4 dummy cycle, 133MHz

with 8 dummy cycle

- 4READ: 104MHz with 6 dummy cycle, 133MHz

with 10 dummy cycle

- Configurable dummy cycle number for 2READ

and 4READ operation

- 8/16/32/64 byte Wrap-Around Burst Read Mode

• Low Power Consumption

• Typical 100,000 erase/program cycles

• 20 years data retention

SOFTWARE FEATURES

• Input Data Format

- 1-byte Command code

• Advanced Security Features

- Block Lock Protection

The BP0-BP3 and T/B status bits define the site of

the area to be protected against program and erase

instructions.

P/N: PM2278

• Additional 4K bits secured OTP

- Features unique identifier

- Factory locked identifiable and customer lockable

• Auto Erase and Auto Program Algorithms

sector

-

Automatically programs and verifies data at se-

lected page by an internal algorithm that automati-

cally times the program pulse width (Any page to be

programmed should have page in the erased state

first.)

•

Status Register Feature

•

Command Reset

•

Program/Erase Suspend

•

Program/Erase Resume

•

Electronic Identification

-

JEDEC 1-byte Manufacturer ID and 2-byte Device

ID

- RES command for 1-byte Device ID

•

Support Serial Flash Discoverable Parameters

(SFDP) mode

HARDWARE FEATURES

•

SCLK Input

• SI/SIO0

-

Serial Data Input or Serial Data Input/Output for

2 x I/O mode or Serial Data Input/Output for 4 x I/O

mode

• SO/SIO1

-

Serial Data Output or Serial Data Input/Output for

2 x I/O mode or Serial Data Input/Output for 4 x I/O

mode

• WP#/SIO2

-

Hardware Write Protection or Serial Data Input/

Output for 4 x I/O mode

• HOLD#/SIO3

-

To pause the device without deselecting the de-

vice or Serial Data Input/Output for 4 x I/O mode

• PACKAGE

- 8-pin SOP (200mil)

-

All devices are RoHS Compliant and Halogen-

free

Rev. 1.2, November 22, 2016

-

Automatically erases and verifies data at selected

-

Serial clock input

4

MX25L3236F

2. GENERAL DESCRIPTION

MX25L3236F is 32Mb bits Serial NOR Flash memory, which is configured as 4,194,304 x 8 internally. When it is

in four I/O mode, the structure becomes 8,388,608 bits x 4. When it is in two I/O mode, the structure becomes

16,777,216 bits x 2.

MX25L3236F features a serial peripheral interface and software protocol allowing operation on a simple 3-wire

bus while it is in single I/O mode. The three bus signals are a clock input (SCLK), a serial data input (SI), and a

serial data output (SO).

Serial

access to the device is enabled by CS# input.

MX25L3236F, MXSMIO

®

(Serial Multi I/O) flash memory, provides sequential read operation on the whole chip

and multi-I/O features.

When it is in quad I/O mode, the SI pin, SO pin, WP# pin and HOLD# pin become SIO0 pin, SIO1 pin, SIO2 pin

and SIO3 pin for address/dummy bits input and data Input/Output.

After program/erase command is issued, auto program/erase algorithms which program/erase and verify the

specified page or sector/block locations will be executed. Program command is executed on byte basis, or page (256

bytes) basis. Erase command is executed on 4K-byte sector, 32K-byte/64K-byte block, or whole chip basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status

read command can be issued to detect completion status of a program or erase operation via WIP bit.

When the device is not in operation and CS# is high, it is put in standby mode.

The MX25L3236F utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after

100,000 program and erase cycles.

P/N: PM2278

5

Rev. 1.2, November 22, 2016