MX25L3233FM2I-08Q

MX25L3233F

MX25L3233F

3V, 32M-BIT [x 1/x 2/x 4]

CMOS MXSMIO

®

(SERIAL MULTI I/O)

FLASH MEMORY

Key Features

• Hold Feature

• Multi I/O Support - Single I/O, Dual I/O and Quad I/O

• Auto Erase and Auto Program Algorithms

• Program Suspend/Resume & Erase Suspend/Resume

P/N: PM2113

1

Rev. 1.6, March 10, 2017

MX25L3233F

Contents

1. FEATURES ........................................................................................................................................................ 5

2. GENERAL DESCRIPTION ............................................................................................................................... 6

3. PIN CONFIGURATION ...................................................................................................................................... 7

4. PIN DESCRIPTION ............................................................................................................................................ 7

5. BLOCK DIAGRAM............................................................................................................................................. 8

6. DATA PROTECTION.......................................................................................................................................... 9

Table 1. Protected Area Sizes ..............................................................................................................10

Table 2. 4K-bit Secured OTP Definition

............................................................................................... 11

7. MEMORY ORGANIZATION ............................................................................................................................. 12

Table 3. Memory Organization

.............................................................................................................12

8. DEVICE OPERATION ...................................................................................................................................... 13

9. HOLD FEATURE.............................................................................................................................................. 14

10. COMMAND DESCRIPTION ........................................................................................................................... 16

Table 4. Command Sets

.......................................................................................................................16

10-1. Write Enable (WREN)

..........................................................................................................................19

10-2. Write Disable (WRDI)

...........................................................................................................................20

10-3. Read Identification (RDID)

...................................................................................................................21

10-4. Read Status Register (RDSR)

.............................................................................................................22

10-5. Read Configuration Register (RDCR)

..................................................................................................23

Table 5. Status Register

.......................................................................................................................24

Table 6. Configuration Register

............................................................................................................25

Table 7. Dummy Cycle and Frequency Table

.......................................................................................25

10-6. Write Status Register (WRSR)

.............................................................................................................26

Table 8. Protection Modes

....................................................................................................................27

10-7. Read Data Bytes (READ)

....................................................................................................................29

10-8. Read Data Bytes at Higher Speed (FAST_READ)

..............................................................................30

10-9. Dual Read Mode (DREAD)

..................................................................................................................31

10-10. 2 x I/O Read Mode (2READ)

...............................................................................................................32

10-11. Quad Read Mode (QREAD)

................................................................................................................33

10-12. 4 x I/O Read Mode (4READ)

...............................................................................................................34

10-13. Performance Enhance Mode

...............................................................................................................36

10-14. Burst Read

...........................................................................................................................................37

10-15. Sector Erase (SE)

................................................................................................................................38

10-16. Block Erase (BE)

.................................................................................................................................39

10-17. Block Erase (BE32K)

...........................................................................................................................40

10-18. Chip Erase (CE)

...................................................................................................................................41

10-19. Page Program (PP)

.............................................................................................................................42

10-20. 4 x I/O Page Program (4PP)

................................................................................................................43

10-21. Deep Power-down (DP)

.......................................................................................................................46

10-22. Release from Deep Power-down (RDP), Read Electronic Signature (RES)

.......................................47

10-23. Read Electronic Manufacturer ID & Device ID (REMS)

.......................................................................49

Table 9. ID Definitions

.........................................................................................................................50

10-24. Enter Secured OTP (ENSO)

................................................................................................................50

10-25. Exit Secured OTP (EXSO)

...................................................................................................................50

10-26. Read Security Register (RDSCUR)

.....................................................................................................51

Table 10. Security Register Definition

..................................................................................................52

10-27. Write Security Register (WRSCUR)

.....................................................................................................53

P/N: PM2113

2

Rev. 1.6, March 10, 2017

MX25L3233F

10-28. Program Suspend and Erase Suspend

...............................................................................................54

Table 11. Readable Area of Memory While a Program or Erase Operation is Suspended

..................54

Table 12. Acceptable Commands During Program/Erase Suspend after tPSL/tESL

...........................54

Table 13. Acceptable Commands During Suspend (tPSL/tESL not required)

......................................55

10-29. Program Resume and Erase Resume

.................................................................................................56

10-30. No Operation (NOP)

............................................................................................................................57

10-31. Software Reset (Reset-Enable (RSTEN) and Reset (RST))

...............................................................57

10-32. Read SFDP Mode (RDSFDP)

..............................................................................................................58

Table 14. Signature and Parameter Identification Data Values

...........................................................59

Table 15. Parameter Table (0): JEDEC Flash Parameter Tables

.........................................................60

Table 16. Parameter Table (1): Macronix Flash Parameter Tables

......................................................62

11. POWER-ON STATE ....................................................................................................................................... 64

12. Electrical Specifications

.............................................................................................................................. 65

12-1. Absolute Maximum Ratings

.................................................................................................................65

12-2. Capacitance TA = 25°C, f = 1.0 MHz

...................................................................................................65

Table 17. DC Characteristics

................................................................................................................67

Table 18. AC Characteristics

................................................................................................................68

13. TIMING ANALYSIS ........................................................................................................................................ 70

14. OPERATING CONDITIONS ........................................................................................................................... 72

Table 19. Power-Up/Down Voltage and Timing

....................................................................................74

14-1. Initial Delivery State

.............................................................................................................................74

15. ERASE AND PROGRAMMING PERFORMANCE ........................................................................................ 75

16. DATA RETENTION ........................................................................................................................................ 75

17. LATCH-UP CHARACTERISTICS .................................................................................................................. 75

18. ORDERING INFORMATION .......................................................................................................................... 76

19. PART NAME DESCRIPTION ......................................................................................................................... 77

20. PACKAGE INFORMATION ............................................................................................................................ 78

20-1. 8-pin SOP (150mil)

..............................................................................................................................78

20-2. 8-pin SOP (200mil)

..............................................................................................................................79

20-3. 8-land USON (4x3mm)

........................................................................................................................80

20-4. 16-pin SOP (300mil)

............................................................................................................................81

20-5. 8-WSON (6x5mm)

...............................................................................................................................82

21. REVISION HISTORY ..................................................................................................................................... 83

P/N: PM2113

3

Rev. 1.6, March 10, 2017

MX25L3233F

Figures

Figure 1. Serial Modes Supported (for Normal Serial mode)

.......................................................................................................13

Figure 2. Hold Condition Operation

............................................................................................................................................14

Figure 3. Write Enable (WREN) Sequence (Command 06h).......................................................................................................19

Figure 4. Write Disable (WRDI) Sequence (Command 04h)

......................................................................................................20

Figure 5. Read Identification (RDID) Sequence (Command 9Fh)

..............................................................................................21

Figure 6. Read Status Register (RDSR) Sequence (Command 05h)

.........................................................................................22

Figure 7. Read Configuration Register (RDCR) Sequence

.........................................................................................................23

Figure 8. Write Status Register (WRSR) Sequence (Command 01h)

........................................................................................26

Figure 9. WRSR flow

...................................................................................................................................................................28

Figure 10. Read Data Bytes (READ) Sequence (Command 03h)

..............................................................................................29

Figure 11. Read at Higher Speed (FAST_READ) Sequence (Command 0Bh)

..........................................................................30

Figure 12. Dual Read Mode Sequence (Command 3Bh)

............................................................................................................31

Figure 13. 2 x I/O Read Mode Sequence (Command BBh)

........................................................................................................32

Figure 14. Quad Read Mode Sequence (Command 6Bh)

...........................................................................................................33

Figure 15. 4 x I/O Read Mode Sequence (Command EBh)

........................................................................................................34

Figure 16. 4 x I/O Read enhance performance Mode Sequence (Command EBh) (SPI Mode)

.................................................36

Figure 17. Burst Read

..................................................................................................................................................................37

Figure 18. Sector Erase (SE) Sequence (Command 20h)

.........................................................................................................38

Figure 19. Block Erase (BE) Sequence (Command D8h)

..........................................................................................................39

Figure 20. Block Erase 32KB (BE32K) Sequence (Command 52h)

..........................................................................................40

Figure 21. Chip Erase (CE) Sequence (Command 60h or C7h)

................................................................................................41

Figure 22. Page Program (PP) Sequence (Command 02h)

.......................................................................................................42

Figure 23. 4 x I/O Page Program (4PP) Sequence (Command 38h)

.........................................................................................43

Figure 24. Program/Erase Flow(1) with read array data

..............................................................................................................44

Figure 25. Program/Erase Flow(2) without read array data

.........................................................................................................45

Figure 26. Deep Power-down (DP) Sequence (Command B9h)

................................................................................................46

Figure 27. Release from Deep Power-down and Read Electronic Signature (RES) Sequence (Command ABh)

......................47

Figure 28. Release from Deep Power-down (RDP) Sequence

...................................................................................................48

Figure 29. Read Electronic Manufacturer & Device ID (REMS) Sequence

.................................................................................49

Figure 30. Read Security Register (RDSCUR) Sequence (Command 2Bh)

...............................................................................51

Figure 31. Write Security Register (WRSCUR) Sequence (Command 2Fh) (SPI mode)

............................................................53

Figure 32. Suspend to Read Latency

..........................................................................................................................................55

Figure 33. Resume to Suspend Latency

.....................................................................................................................................55

Figure 34. Suspend to Program Latency

.....................................................................................................................................56

Figure 35. Resume to Read Latency

...........................................................................................................................................56

Figure 36. Software Reset Recovery

...........................................................................................................................................57

Figure 37. Read Serial Flash Discoverable Parameter (RDSFDP) Sequence

............................................................................58

Figure 38. Maximum Negative Overshoot Waveform

..................................................................................................................65

Figure 39. Maximum Positive Overshoot Waveform

....................................................................................................................65

Figure 40. Input Test Waveforms and Measurement Level

.........................................................................................................66

Figure 41. Output Loading

...........................................................................................................................................................66

Figure 42. SCLK TIMING DEFINITION

.......................................................................................................................................66

Figure 43. Serial Input Timing

......................................................................................................................................................70

Figure 44. Output Timing

.............................................................................................................................................................70

Figure 45. Hold Timing

.................................................................................................................................................................71

Figure 46. WP# Setup Timing and Hold Timing during WRSR when SRWD=1

..........................................................................71

Figure 47. AC Timing at Device Power-Up

..................................................................................................................................72

Figure 48. Power-Down Sequence

..............................................................................................................................................73

Figure 49. Power-up Timing

.........................................................................................................................................................73

Figure 50. Power Up/Down and Voltage Drop

.............................................................................................................................74

P/N: PM2113

4

Rev. 1.6, March 10, 2017

MX25L3233F

32M-BIT [x 1 / x 2 / x 4] CMOS MXSMIO

®

(SERIAL MULTI I/O)

FLASH MEMORY

1. FEATURES

GENERAL

• Supports Serial Peripheral Interface -- Mode 0 and

Mode 3

•

33,554,432 x 1 bit structure

or 16,777,216 x 2 bits (two I/O read mode) struc-

ture

or 8,388,608 x 4 bits (four I/O mode) structure

• 1024 Equal Sectors with 4K bytes each

- Any Sector can be erased individually

• 128 Equal Blocks with 32K bytes each

- Any Block can be erased individually

• 64 Equal Blocks with 64K bytes each

- Any Block can be erased individually

• Power Supply Operation

- 2.65 to 3.6 volt for read, erase, and program op-

erations

• Latch-up protected to 100mA from -1V to Vcc +1V

PERFORMANCE

• High Performance

VCC = 2.65 to 3.6V

- Normal read

- 50MHz

- Fast read

- FAST_READ, DREAD, QREAD:

133MHz with 8 dummy cycles

- 2READ:

104MHz with 4 dummy cycle,

133MHz with 8 dummy cycle

- 4READ:

104MHz with 6 dummy cycle,

133MHz with 10 dummy cycle

- Configurable dummy cycle number for 2READ

and 4READ operation

- 8/16/32/64 byte Wrap-Around Burst Read Mode

• Low Power Consumption

• Typical 100,000 erase/program cycles

• 20 years data retention

KEY FEATURES

• Input Data Format

- 1-byte Command code

• Advanced Security Features

- Block Lock Protection

The BP0-BP3 and T/B status bits define the site of the

area to be protected against program and erase instruc-

tions.

• Additional 4K bits secured OTP

- Features unique identifier

- Factory locked identifiable and customer lockable

• Auto Erase and Auto Program Algorithms

-

Automatically erases and verifies data at selected

sector

ed page by an internal algorithm that automatically

times the program pulse width (Any page to be pro-

grammed should have page in the erased state first.)

•

Status Register Feature

•

Command Reset

•

Program/Erase Suspend

•

Program/Erase Resume

•

Electronic Identification

ID

- RES command for 1-byte Device ID

•

Support Serial Flash Discoverable Parameters (SFDP)

mode

-

All devices are RoHS Compliant and Halogen-

free

-

Automatically programs and verifies data at select-

-

JEDEC 1-byte Manufacturer ID and 2-byte Device

P/N: PM2113

5

Rev. 1.6, March 10, 2017