MEM2302
N-Channel MOSFET MEM2302X
General Description
MEM2302XG Series N-channel enhancement mode
field-effect transistor ,produced with high cell density
DMOS trench technology, which is especially used to
minimize on-state resistance. This device particularly
suits low voltage applications, and low power
dissipation in a very small outline surface mount
package.
Features
20V/3A
R
DS(ON)
=29mΩ@ V
GS
=4.5V, I
D
=3A
R
DS(ON)
=36mΩ@ V
GS
=2.5V, I
D
=2A
High Density Cell Design For Ultra Low On-Resistance
Subminiature surface mount package:SOT23
Pin Configuration
Typical Application
Battery management
High speed switch
Low power DC to DC converter
Absolute Maximum Ratings
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current
Pulsed Drain Current
1,2
Total Power Dissipation
T
A
=25℃
T
A
=70℃
T
A
=25℃
T
A
=70℃
Symbol
V
DSS
V
GSS
I
D
I
DM
Pd
T
j
T
stg
Ratings
20V
±
8
3
2
15
0.7
0.46
150
-65/150
Unit
V
V
A
A
W
℃
℃
operating junction temperature
Storage Temperature Range
V6.0
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MEM2302
Thermal Characteristics
Parameter
Thermal Resistance,Junction-to-Ambient
Electrical Characteristics
MEM2302X
Parameter
Symbol
Test Condition
Min
Type
Max
Unit
Static Characteristics
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
Static Drain-Source On-Resistance
Forward Transconductance
Source-drain (diode forward) voltage
V
(BR)DSS
V
GS(th)
I
GSS
I
DSS
R
DS(ON)
g
FS
V
SD
V
GS
=0V, I
D
=250uA
V
DS
= V
GS
, I
D
=250uA
V
DS
=0V，V
GS
=8V
V
DS
=0V，V
GS
=-8V
V
DS
=20V V
GS
=0V
V
GS
=4.5V, I
D
=3A
V
GS
=2.5V, I
D
=2A
V
DS
= 5 V, I
D
= 3.6A
V
GS
=0V,I
S
=1.25A
0.4
20
0.51
23
0.53
1.6
－0.2
6.3
29
36
8
0.7
1
0.85
100
－100
1000
50
65
V
V
nA
nA
nA
mΩ
mΩ
S
V
Symbol
RθJA
Ratings
140
Unit
℃/W
Dynamic Characteristics
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Ciss
Coss
Crss
V
DS
= 10 V,
V
GS
= 0 V,
f = 1 MHz
V
DD
= 15 V,
R
L
= 2.8Ω
I
D
＝3.6A
V
GEN
= 4.5V,
Rg = 36Ω
V
DS
= 10V,
V
GS
= 4.5 V,
I
D
= 3.6A
300
120
80
pF
Switching Characteristics
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall-Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
8
50
15
10
4
0.65
1.5
15
80
60
25
10
nc
ns
1、Repetitive rating, pulse width limited by junction temperature.
2、Pulse width <300us , duty cycle <0.5%.
V6.0
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PCB设计
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