FM24C04D
2-Wire Serial EEPROM
With Unique ID and Security Sector
Data Sheet
Dec. 2015
Data Sheet
FM24C04D 2-Wire Serial EEPROM
Ver1.2
1
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Data Sheet
FM24C04D 2-Wire Serial EEPROM
Ver1.2
2
Description
The FM24C04D provides 4096 bits of serial
electrically erasable and programmable read-only
memory (EEPROM) organized as 512 words of 8
bits each, with 128-bit UID and 16-byte Security
Sector. The device is optimized for use in many
industrial and commercial applications where
low-power and low-voltage operations are essential.
Packaging Type
PDIP8
A0
A1
A2
GND
1
8
7
6
5
VCC
WP
SCL
SDA
2
3
4
Features
Low Operation Voltage: V
CC
= 1.7V to 5.5V
Internally Organized: 512 x 8
2-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise
Suppression
Bi-directional Data Transfer Protocol
1MHz (2.5V~5.5V) and 400 kHz (1.7V)
Compatibility
Write Protect Pin for Hardware Data Protection
16-Byte Page Write Modes (Partial Page
Writes are Allowed)
Lockable 16-Byte Security Sector
128-Bit Unique ID for each device
Self-timed Write Cycle (5 ms max)
High-reliability
–
Endurance: 1,000,000 Write Cycles
–
Data Retention: 40 Years
PDIP8 (RoHS Compliant)
SOP8, TSSOP8, TSOT23-5L and TDFN8
Packages (RoHS Compliant and Halogen-free)
Wafer Sales: available in Wafer Form
A0
A1
A2
GND
1
2
3
4
SOP8
8
7
6
5
VCC
WP
SCL
SDA
TSSOP8
A0
A1
A2
GND
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
TSOT23-5L
SCL
GND
SDA
Vcc
WP
TDFN8 (2x3mm)
A0
A1
A2
GND
1
2
3
4
8
7
6
5
Absolute Maximum Ratings
Operating Temperature
(Plastic Package)
Storage Temperature
(Plastic Package)
Voltage on Any Pin with Respect
to Ground
Maximum Operating Voltage
DC Output Current
-55°C to +125°C
-65°C to +150°C
-1.0V to +7.0V
6.25V
5.0 mA
VCC
WP
SCL
SDA
Pin Configurations
Pin Name
A0½A2
SDA
SCL
WP
V
CC
GND
Function
Not Connected
Serial Data Input/Output
Serial Clock Input
Write Protect
Power Supply
Ground
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation
of the device at these or any other conditions beyond those
indicated in the operational sections of this specification are
not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Data Sheet
FM24C04D 2-Wire Serial EEPROM
Ver1.2
3
Figure 1.Block Diagram
Data Sheet
FM24C04D 2-Wire Serial EEPROM
Ver1.2
4
Pin Description
SERIAL CLOCK (SCL):
The SCL input is used to
positive edge clock data into each EEPROM device
and negative edge clock data out of each device.
SERIAL DATA (SDA):
The SDA pin is bi-directional
for serial data transfer. This pin is open-drain driven
and may be wire-ORed with any number of other
open-drain or open-collector devices.
DEVICE/PAGE ADDRESSES:
A total of one device
may be addressed on a single bus system.
WRITE PROTECT (WP):
The FM24C04D
has a
Write Protect pin that provides hardware data
protection. The WP pin allows normal write operations
when connected to ground (GND). When the Write
Protect pin is connected to VCC, all write operations
to the memory are inhibited. If the pin is left floating,
the WP pin will be internally pulled down to GND if
the capacitive coupling to the circuit board Vcc plane
is <3pF. If coupling is >3pF, FMSH recommends
connecting the WP to GND. Switching WP to VCC
prior to a write operation creates a software write
protected function.
Write Protect Description
WP Pin
Status
WP=V
CC
WP=GND
Part of the Array Protected
FM 24C04D
Full (4K) Array
Normal Read/Write Operations
Memory Organization
FM24C04D, 4K SERIAL EEPROM:
Internally organized with 32 pages of 16 bytes each, the 4K requires an
11-bit data word address for random word addressing.
Security Sector
:
The FM24C04D offers 16-byte Security Sectors which can be written and (later)
permanently locked in Read-only mode. These registers may be used by the system manufacturers to store
security and other important information separately from the main memory array.
Unique ID:
The FM24C04D utilizes a separate memory block containing a factory programmed 128-bit
unique ID. Access to this memory location is obtained by beginning the device address word with a ‘1011’(Bh)
sequence.
Memory Organization
Device Address
WORD Address
1
2
1010 00xx
xxxx xxxx
Data Memory (32 X 16B)
3
4
1011 00xx
00xx xxxx
Security Sector (1 X 16B)
5
6
1011 00x1
10xx xxxx
Unique ID (1 X 16B)
Note:
1. The seventh bit are memory page address bits (P0) ,and the eighth bit is the read/write operation select
bit.
2. Address bits P0 and A<7:4> define page address and A<3:0> define byte address.
3. The seventh bit is don’t care, and the eighth bit is the read/write operation select bit.
4. Address bits A<7:6> must be ‘00’, A<3:0> define byte address, other bits are don’t care.
5. The seventh bit is don’t care,and the eighth bit is the read/write operation select bit which must be ‘1’.
6. Address bits A<7:6> must be ‘10’, A<3:0> define byte address, other bits are don’t care.
Data Sheet
FM24C04D 2-Wire Serial EEPROM
Ver1.2
5