www.chipanalog.com
CA-IS3730, CA-IS3731, CA-IS3735
Preview Version
CA-IS373x High-Speed Triple-Channel Digital Isolators
1.
•
•
•
•
•
•
•
•
•
Key Features
Signal Rate: DC to 150Mbps
Wide Operating Supply Voltage: 2.5V to 5.5V
Wide Operating Temperature Range: -40°C to 125°C
No Start-Up Initialization Required
Default Output High and Low Options
High Electromagnetic Immunity
High CMTI: ±100kV/µs (Typical)
Low Power Consumption (Typical):
▪
1.5mA per Channel at 1Mbps with 3.3V Supply
▪
5.5mA per Channel at 100Mbps with 3.3V Supply
Precise Timing (Typical)
▪
8ns Propagation Delay
▪
1ns Pulse Width Distortion
▪
2ns Propagation Delay Skew
▪
5ns Minimum Pulse Width
Isolation Rating up to 5kVrms
Isolation Barrier Life: >40 Years at Rated Working
Voltage
Tri-state Outputs with ENABLE
Schmitt Trigger Inputs
RoHS-Compliant Packages
▪
SOIC-16 Narrow Body
▪
SOIC-16 Wide Body
dioxide (SiO
2
) insulation barrier. The CA-IS3730 device has
all three channels in the same direction with output enable
on output side, the CA-IS3731 device has two forward and
one reverse-direction channels with output enable on both
sides, and the CA-IS3735 device has the same channel
configuration as CA-IS3730 without output enable. All
devices have fail-safe mode option. If the input power or
signal is lost, default output is low for devices with suffix L
and high for devices with suffix H.
CA-IS373x devices has high insulation capability to handle
noise and surge on a data bus or other circuits from entering
the local ground and interfering with or damaging sensitive
circuitry. High CMTI ability promises the correct
transmission of digital signal. The CA-IS373x devices are
available in 16-pin narrow body SOIC and 16-pin wide body
SOIC packages. All products have > 2.5kVrms isolation rating,
and products in wide-body packages support insulation
withstanding up to 5kVrms.
•
•
•
•
•
Device Information
PART
NUMBER
PACKAGE
SOIC16-NB (N)
SOIC16-WB(W)
BODY SIZE(NOM)
9.90 mm × 3.90 mm
10.30 mm × 7.50 mm
2.
•
•
•
•
•
•
Applications
Industrial Automation Systems
Motor Control
Medical Electronics
Isolated Switch Mode Supplies
Solar Inverters
Isolated ADC, DAC
CA-IS3730,
CA-IS3731,
CA-IS3735
Simplified Channel Structure
Channel A side
Schmitt Trigger
Mixer
Driver
RX
Isolation
Barrrier
Channel B side
Driver
VOUT
3.
Description
VIN
The CA-IS373x devices are high-performance triple-channel
digital isolators with precise timing characteristics and low
power consumption. The CA-IS373x devices provide high
electromagnetic immunity and low emissions, while
isolating CMOS digital I/Os. All device versions have Schmitt
trigger input for high noise immunity. Each isolation channel
consists of a transmitter and a receiver separated by silicon
GNDA
GNDB
Channel A side and B side are separated by isolation
capacitors. GNDA and GNDB are the isolated ground for
signals and supplies of A side and B side respectively.
Copyright © 2018, ChipAnalog Incorporated
CA-IS3730, CA-IS3731, CA-IS3735
Preview Version
www.chipanalog.com
4.
Ordering Guide
Table 4-1 Ordering Guide for Valid Ordering Part Number
Ordering Part Number
Number of Inputs
A Side
Number of Inputs
B Side
Default
Output
Isolation
Rating (kV)
Output
Enable
Package
CA-IS3730LN
CA-IS3730LW
CA-IS3730HN
CA-IS3730HW
CA-IS3731LN
CA-IS3731LW
CA-IS3731HN
CA-IS3731HW
CA-IS3735LN
CA-IS3735LW
CA-IS3735HN
CA-IS3735HW
3
3
3
3
2
2
2
2
3
3
3
3
0
0
0
0
1
1
1
1
0
0
0
0
Low
Low
High
High
Low
Low
High
High
Low
Low
High
High
2.5
5
2.5
5
2.5
5
2.5
5
2.5
5
2.5
5
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
NB SOIC-16
WB SOIC-16
NB SOIC-16
WB SOIC-16
NB SOIC-16
WB SOIC-16
NB SOIC-16
WB SOIC-16
NB SOIC-16
WB SOIC-16
NB SOIC-16
WB SOIC-16
Copyright © 2018, ChipAnalog Incorporated
www.chipanalog.com
CA-IS3730, CA-IS3731, CA-IS3735
Preview Version
Table of Contents
1.
2.
3.
4.
5.
6.
7.
Key Features ........................................................1
Applications .........................................................1
Description ..........................................................1
Ordering Guide ....................................................2
Revision History ...................................................3
PIN Descriptions and Functions ............................4
Specifications .......................................................5
7.8.
7.7.1.
7.7.2.
7.7.3.
7.8.1.
7.8.2.
7.8.3.
Timing Characteristics ....................................... 11
V
DDA
= V
DDB
= 5 V ± 10%, T
A
= -40 to 125°C ....... 11
V
DDA
= V
DDB
= 3.3 V ± 10%, T
A
= -40 to 125°C .... 11
V
DDA
= V
DDB
= 2.5 V ± 5%, T
A
= -40 to 125°C ...... 12
V
DDA
= V
DDB
= 5 V ± 10%, T
A
= -40 to 125°C ......... 8
V
DDA
= V
DDB
= 3.3 V ± 10%, T
A
= -40 to 125°C ...... 9
V
DDA
= V
DDB
= 2.5 V ± 5%, T
A
= -40 to 125°C ...... 10
7.1.
7.2.
7.3.
7.4.
7.5.
7.6.
7.7.
7.6.1.
7.6.2.
7.6.3.
Absolute Maximum Ratings
1
............................... 5
ESD Ratings.......................................................... 5
Recommended Operating Conditions ................. 5
Thermal Information ........................................... 6
Power Rating ....................................................... 6
Electrical Characteristics ..................................... 7
V
DDA
= V
DDB
= 5 V ± 10%, T
A
= -40 to 125°C.......... 7
V
DDA
= V
DDB
= 3.3 V ± 10%, T
A
= -40 to 125°C....... 7
V
DDA
= V
DDB
= 2.5 V ± 5%, T
A
= -40 to 125°C......... 7
8.
9.
10. Application and Implementation ........................17
11. Package Information ..........................................18
9.1.
9.2.
9.3.
Parameter Measurement Information ................ 13
Detailed Description ..........................................15
Theory of Operation ......................................... 15
Functional Block Diagram ................................. 15
Device Operation Modes .................................. 16
Supply Current Characteristics ............................ 8
11.1. 16-Pin Wide Body SOIC Package Outline and
Recommended Land Pattern .......................................... 18
11.2. 16-Pin Narrow Body SOIC Package Outline....... 19
5.
Revision History
NOTE:
Page numbers for previous revisions may differ from page numbers in the current version.
This is a preview version, initialized on July 23
rd
2018.
Copyright © 2018, ChipAnalog Incorporated
CA-IS3730, CA-IS3731, CA-IS3735
Preview Version
6. PIN Descriptions and Functions
CA-IS3730 16-Pin SOIC NB/WB Top View
VDDA
VDDB
www.chipanalog.com
CA-IS3731 16-Pin SOIC NB/WB Top View
VDDA
VDDB
CA-IS3735 16-Pin SOIC NB/WB Top View
VDDA
VDDB
ISOLATION BARRIER
ISOLATION BARRIER
ISOLATION BARRIER
GNDA
GNDB
GNDA
GNDB
GNDA
GNDB
A1
TX
TX
TX
RX
RX
RX
B1
A1
TX
TX
RX
RX
RX
TX
B1
A1
TX
TX
TX
RX
RX
RX
B1
A2
B2
A2
B2
A2
B2
A3
B3
A3
B3
A3
B3
NC
NC
NC
NC
NC
NC
NC
ENB
ENA
ENB
NC
NC
GNDA
GNDB
GNDA
GNDB
GNDA
GNDB
Figure 6-1 CA-IS373x Top View
Table 6-1 CA-IS373x Pin Description and Functions
Name
VDDA
GNDA
A1
A2
A3
NC
1
/ENA
NC
GNDA
GNDB
NC
1
/ENB
NC
B3
B2
B1
GNDB
VDDB
SOIC-16 Pin#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Type
Supply
Ground
Digital Input
Digital Input
Digital I/O
No Connect
Digital Input
Ground
Ground
Digital Input
No Connect
Digital I/O
Digital Output
Digital Output
Ground
Supply
Description
Side A Power Supply
Side A Ground
Side A Digital Input
Side A Digital Input
Side A Digital Input for CA-IS3730/35 or Output for CA-IS3731
No Connect
Side A Active High Enable. NC for CA-IS3730/35
Side A Ground
Side B Ground
Side B Active High Enable. NC for CA-IS3735
No Connect
Side B Digital Input for CA-IS3731 or Output for CA-IS3730/35
Side B Digital Output
Side B Digital Output
Side B Ground
Side B Power Supply
Note:
1. No Connect. These pins are not internally connected. They can be left floating, tied to VDD or tied to GND
Copyright © 2018, ChipAnalog Incorporated
www.chipanalog.com
7. Specifications
CA-IS3730, CA-IS3731, CA-IS3735
Preview Version
7.1.
Absolute Maximum Ratings
1
Voltage
2
MIN
-0.5
-0.5
15
MAX
6.0
V
DDA
+0.5
3
15
150
150
UNIT
V
V
mA
°C
°C
V
DDA
, V
DDB
Supply
V
in
Voltage at Ax, Bx, ENx
I
O
Output Current
T
J
Junction Temperature
T
STG
Storage Temperature
-65
NOTE:
1. Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. All voltage values except differential I/O bus voltages are with respect to the local ground terminal (GNDA or GNDB) and are peak voltage
values.
3. Maximum voltage must not exceed 6 V.
7.2.
ESD Ratings
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins
2
pins
1
VALUE
2000
200
UNIT
V
V
ESD
Electrostatic discharge
NOTE:
1. JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
2. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3.
Recommended Operating Conditions
Supply Voltage
VDD Undervoltage Threshold When Supply Voltage is Rising
VDD Undervoltage Threshold When Supply Voltage is Falling
VDD Undervoltage Threshold Hysteresis
High-level Output Current
= 5V
V
DDO
= 3.3V
V
DDO
= 2.5V
V
DDO
= 5V
V
DDO
= 3.3V
V
DDO
= 2.5V
V
DDO1
MIN
2.375
1.95
1.88
50
-4
-2
-1
4
2
2
2.0
0
-40
0.8
150
125
TYP
3.3
2.24
2.16
70
MAX
5.5
2.375
2.325
95
UNIT
V
V
V
mV
mA
V
DDA
, V
DDB
V
DD
（
UVLO+
）
V
DD
（
UVLO-
）
V
HYS
（
UVLO
）
I
OH
I
OL
Low-level Output Current
mA
V
V
Mbps
°C
V
IH
High-level Input Voltage
V
IL
Low-level Input Voltage
DR
Data Rate
T
A
Ambient Temperature
NOTE:
1. V
DDO
= Output-side V
DD
27
Copyright © 2018, ChipAnalog Incorporated
机器人开发
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
