AZ1045-02F
Ultra Low Capacitance ESD Protection Array
For High Speed I/O Port
Features
ESD Protect for 2 high-speed I/O channels
Provide ESD protection for each channel to
IEC 61000-4-2, (ESD) ±15kV (air), ±10kV (contact)
Description
AZ1045-02F is a design which includes ESD
rated diode arrays to protect high speed data
interfaces. The AZ1045-02F has been
specifically designed to protect sensitive
components which are connected to data and
transmission lines from over-voltage caused by
Electrostatic Discharging (ESD).
AZ1045-02F is a unique design which includes
ESD rated, ultra low capacitance steering diodes
and a unique design of clamping cell which is an
equivalent TVS diode
in a single package. During
transient conditions, the steering diodes direct
the transient to either the internal ESD line or to
ground line. The internal unique design of
clamping cell prevents over-voltage on the
internal ESD line and on the I/O line, which is
protecting any downstream components.
AZ1045-02F may be used to meet the ESD
immunity requirements of IEC 61000-4-2, Level 4
(±15kV air,
±8kV
contact discharge).
For operating voltage of 5V and below
Ultra low capacitance: 0.5pF typical
Fast turn-on and Low clamping voltage
Array of ESD rated diodes with internal
equivalent TVS diode
Solid-state silicon-avalanche and active circuit
triggering technology
Simplified layout for high-speed differential
signaling channels
Green part
Applications
MHL (Mobile High-Definition Link)
USB 3.0 and USB 2.0
HDMI 1.4 and HDMI 1.3
DisplayPort interface
SATA and eSATA interface
Mobile Phones
Hand Held Portable Applications
Circuit Diagram
Pin Configuration
Line-1
Line-2
GND
1
2
3
6
5
4
NC
NC
NC
1
2
3
DFN1210P6X (Top View)
Revision 2011/12/13
©2011-2012 Amazing Micro.
1
www.amazingIC.com
AZ1045-02F
Ultra Low Capacitance ESD Protection Array
For High Speed I/O Port
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Peak Pulse Current (tp= 8/20µs)
Operating Voltage (I/O pin-GND)
ESD per IEC 61000-4-2 (Air)
ESD per IEC 61000-4-2 (Contact)
Lead Soldering Temperature
Operating Temperature
Storage Temperature
PARAMETER
I
pp
V
DC
V
ESD
T
SOL
T
OP
T
STO
ELECTRICAL CHARACTERISTICS
SYMBOL
CONDITIONS
V
RWM
I
CH-Leak
V
BV
V
F
V
clamp
Pin-1,-2 to pin-3, T=25
o
C.
V
Pin-1,-2
= 5V, V
Pin-3
= 0V, T=25
o
C.
I
BV
= 1mA, T=25
o
C, Pin-1,-2 to pin-3.
I
F
= 15mA, T=25
o
C, Pin-3 to pin-1,-2.
IEC 61000-4-2 +6kV, T=25
o
C,
Contact mode, any I/O pin to Ground.
IEC 61000-4-2, 0~+6kV, T=25
o
C,
Contact mode, any I/O pin to Ground.
V
Pin-3
= 0V,
V
IN
= 2.5V,
f = 1MHz, T=25
o
C, any I/O pin to Ground.
V
Pin-3
= 0V,
V
IN
= 2.5V,
f = 1MHz, T=25
C , between I/O pins.
6
0.9
12
1.1
RATING
3.5
5.5
±15
±10
260 (10 sec.)
-55 to +85
-55 to +150
UNITS
A
V
kV
o
o
o
C
C
C
PARAMETER
Reverse Stand-Off
Voltage
Channel Leakage
Current
Reverse Breakdown
Voltage
Forward Voltage
ESD Clamping
Voltage
ESD Dynamic
Turn-on Resistance
Channel Input
Capacitance
Channel to Channel
Input Capacitance
MIN
TYP
MAX
UNITS
5
V
µ
A
V
V
V
Ω
1.5
R
dynamic
0.3
C
IN
0.5
0.65
pF
C
CROSS
o
0.04
0.08
pF
Revision 2011/12/13
©2011-2012 Amazing Micro.
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AZ1045-02F
Ultra Low Capacitance ESD Protection Array
For High Speed I/O Port
Typical Characteristics
1.0
0.9
Input Capacitance (pF)
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Typical Variation of CIN vs. VIN
o
f = 1MHz, T=25 C,
0.10
0.09
Input Capacitance (pF)
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0.00
0.0
0.5
Typical Variation of CIO-to-IO vs. VIN
f = 1MHz, T=25 oC,
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Input Voltage (V)
Input Voltage (V)
Insertion Loss S21 (IO-to-GND)
0
20
10
Analog Cross Talk
Analog Cross Talk (dB)
4.0GHz : -3dB
-3
Insertion Loss (dB)
-6
-9
-12
-15
-18
-21
-24
-27
-30
1e+8
1e+9
0
-10
-20
-30
-40
-50
-60
-70
-80
1e+8
1e+9
Frequency (Hz)
Frequency (Hz)
Transmission Line Pulsing (TLP) Current (A)
Transmission Line Pulsing (TLP) Measurement
18
16
14
V_pulse
12
10
8
6
4
2
0
0
Pulse from a
transmission line
TLP_I
100ns
+
TLP_V
-
DUT
I/O to GND
2
4
6
8
10
12
14
Transmission Line Pulsing (TLP) Voltage (V)
Revision 2011/12/13
©2011-2012 Amazing Micro.
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AZ1045-02F
Ultra Low Capacitance ESD Protection Array
For High Speed I/O Port
Applications Information
A. Device Connection
The AZ1045-02F is designed to protect two
data lines from transient over-voltage (such as
ESD stress pulse). The device connection of
AZ1045-02F is shown in the Fig. 1. In Fig. 1, the
two protected data lines are connected to the
ESD protection pins (pin1, pin2) of AZ1045-02F.
The ground pin (pin3) of AZ1045-02F is a
negative reference pin. This pin should be
directly connected to the GND rail of PCB
(Printed Circuit Board). To get minimum parasitic
inductance, the path length should keep as short
as possible.
AZ1045-02F can provide protection for 2 I/O
signal lines simultaneously. If the number of I/O
signal lines is less than 2, the unused I/O pins
can be simply left as NC pins.
To
I/O-port
Connector
1
2
3
6
5
4
data
line
To
Protected
IC
data
line
GND rail
AZ1045-02F
Fig. 1 Data lines connection of AZ1045-02F.
B. Application
AZ1045-02F is designed for protecting high
speed I/O ports from over-voltage caused by
Electrostatic Discharging (ESD). Thus, a lot of
kinds of high speed I/O ports can be the
applications of AZ1045-02F. Fig. 2 shows MHL
ESD protection by using AZ1045-02F. The
AZ1045-02F is designed for allowing the traces
to run straight through the device to simplify the
PCB layout. The best way to design the PCB
trace is using the flow through layout.
MHL Connector
MHL Transmitter
V
BUS
MHL-
MHL+
GND
1
2
3
6
5
4
MHL-
MHL+
C
BUS
GND
AZ1045-02F
Fig. 2 MHL ESD Protection by using AZ1045-02F.
Revision 2011/12/13
©2011-2012 Amazing Micro.
4
www.amazingIC.com
AZ1045-02F
Ultra Low Capacitance ESD Protection Array
For High Speed I/O Port
Mechanical Details
DFN1210P6X
PACKAGE DIAGRAMS AND DIMENSIONS
A
F
E
D
B
45
o
0.438
TOP VIEW
BOTTOM VIEW (unit in mm)
C
SYMBOL
A
B
C
C1
D
E
F
MIN.
0.95
1.15
0.41
0.00
Millimeters
NOM.
1.00
1.20
0.45
0.02
0.40
MAX.
1.05
1.25
0.50
0.05
0.15
0.25
0.20
0.35
0.25
0.45
C1
SIDE VIEW
Revision 2011/12/13
©2011-2012 Amazing Micro.
5
www.amazingIC.com