AZ4A12-01F
Transient Voltage Suppressing Device
Tiny Package for ESD/Transient Protection
Features
ESD Protect for 1 Line with Bi-directional
Provide ESD protection for the protected line to
IEC 61000-4-2 (ESD)
±20kV (air), ±20kV
(contact)
IEC 61000-4-4 (EFT) 50A (5/50ns)
IEC 61000-4-5 (Lightning) 3A (8/20µs)
Cable Discharge Event (CDE)
AZ4A12-01F is a unique design which includes
proprietary clamping cell in a single package.
During transient conditions, the proprietary
clamping cell prevents over-voltage on the power
line or control/data lines, protecting any
downstream components.
AZ4A12-01F may be used to meet the ESD
immunity requirements of IEC 61000-4-2, Level 4
(±15kV air,
±8kV
contact discharge)
0201 small DFN package
saves board space
Protect one I/O line or one power line
Fast turn-on and Low clamping voltage
For operating voltage of
12V and below
Solid-state silicon-avalanche and active circuit
triggering technology
Green Part
Circuit Diagram /
Pin Configuration
Applications
Mobile Phones
Hand Held Portable Applications
Computer Interfaces Protection
Microprocessors Protection
Serial and Parallel Ports Protection
Control Signal Lines Protection
Power lines on PCB Protection
Latchup Protection
1
2
DFN0603P2Y (Bottom View)
(0.6mm x 0.3mm x 0.3mm)
Description
AZ4A12-01F is a design which includes one
Bi-directional ESD rated clamping cell to protect
one power line, or one control line, or one low
speed data line in an electronic systems. The
AZ4A12-01F has been specifically designed to
protect sensitive components which are
connected to power and control lines from
over-voltage damage and latch-up caused by
Electrostatic Discharging (ESD), Electrical Fast
Transients (EFT), and Cable Discharge Event
(CDE).
Revision 2016/02/25
© 2016 Amazing Micro.
1
www.amazingIC.com
AZ4A12-01F
Transient Voltage Suppressing Device
Tiny Package for ESD/Transient Protection
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Peak Pulse Current (tp=8/20µs)
Operating Supply Voltage
ESD per IEC 61000-4-2 (Air)
ESD per IEC 61000-4-2 (Contact)
Lead Soldering Temperature
Operating Temperature
Storage Temperature
SYMBOL
I
PP
V
DC
V
ESD
T
SOL
T
OP
T
STO
RATING
3
±13.2
±20
±20
260 (10 sec.)
-55 to +85
-55 to +150
o
o
o
UNITS
A
V
kV
C
C
C
ELECTRICAL CHARACTERISTICS
PARAMETER
Stand-Off
Voltage
Leakage
Current
Breakdown
Voltage
ESD Clamping
Voltage
(Note 1)
ESD Dynamic
Turn-on
Resistance
Channel Input
Capacitance
C
IN
R
dynamic
SYMBOL
V
RWM
I
Leak
V
BV
T=25
o
C.
V
RWM
=
±12V,
T=25
o
C.
I
BV
= 1mA, T=25
o
C.
IEC 61000-4-2 +8kV (I
TLP
= 16A),
T=25
o
C, Contact mode.
IEC 61000-4-2, 0~+8kV, T=25
o
C,
Contact mode.
V
R
= 0V, f = 1MHz, T=25
o
C.
13.5
CONDITIONS
MINI
-12
TYP
MAX
12
0.1
16
UNITS
V
µA
V
V
ESD_CL
18
V
0.3
Ω
3.5
5
pF
Note 1: ESD Clamping Voltage was measured by Transmission Line Pulsing (TLP) System.
TLP conditions: Z
0
= 50Ω, t
p
= 100ns, t
r
= 1ns.
Revision 2016/02/25
© 2016 Amazing Micro.
2
www.amazingIC.com
AZ4A12-01F
Transient Voltage Suppressing Device
Tiny Package for ESD/Transient Protection
Typical Characteristics
Transmission Line Pulsing (TLP) Measurement
22
20
18
16
14
12
10
8
6
4
2
0
-2
-4
-6
-8
-10
-12
-14
-16
-18
-20
-22
-24 -20 -16 -12 -8
-4
0
4
8
Transmission Line Pulsing (TLP) Current (A)
Pin-1 to Pin-2
12
16
20
24
Transmission Line Pulsing (TLP) Voltage (V)
Typical Variation of CIN vs. VIN
5
Input Capacitance (pF)
4
3
2
1
f = 1MHz, T = 25
o
C
Pin-1 to Pin-2
0
-12 -10 -8
-6
-4
-2
0
2
4
6
8
10 12
Input Voltage (V)
Revision 2016/02/25
© 2016 Amazing Micro.
3
www.amazingIC.com
AZ4A12-01F
Transient Voltage Suppressing Device
Tiny Package for ESD/Transient Protection
Applications Information
The AZ4A12-01F is designed to protect one line
against
System
ESD/EFT/Cable-Discharge
pulses by clamping it to an acceptable reference.
It provides bi-directional protection.
The usage of the AZ4A12-01F is shown in Fig. 1.
Protected line, such as data line, control line, or
power line, is connected at pin 1. The pin 2 is
connected to a ground plane on the board. In
order to minimize parasitic inductance in the
board traces, all path lengths connected to the
pins of AZ4A12-01F should be kept as short as
possible.
In order to obtain enough suppression of ESD
induced transient, good circuit board is critical.
Thus, the following guidelines are recommended:
Minimize the path length between the
protected lines and the AZ4A12-01F.
Place the AZ4A12-01F near the input
terminals or connectors to restrict transient
coupling.
The ESD current return path to ground
should be kept as short as possible.
Use ground planes whenever possible.
NEVER route critical signals near board
edges and near the lines which the ESD
transient easily injects to.
Input
V
BR
Transient
Voltage
-V
BR
V
BR
Normal
Operation
-V
BR
gnd
gnd
V
CL
gnd
-V
CL
gnd
Output
AZ4A12-01F
AZ4A12-01F
1
2
1
2
Fig. 1
Revision 2016/02/25
© 2016 Amazing Micro.
4
ICto be protected
www.amazingIC.com
AZ4A12-01F
Transient Voltage Suppressing Device
Tiny Package for ESD/Transient Protection
Fig. 2 shows another simplified example of using
AZ4A12-01F to protect the control line, low
speed data line, and power line from ESD
transient stress.
VDD
Chip -B
Chip -A
Low Speed
Data Line
Control Line
Chip -C
2
AZ4A12-01F
2
2
AZ4A12-01F
1
1
GND
Fig. 2
Revision 2016/02/25
© 2016 Amazing Micro.
5
www.amazingIC.com
AZ4A12-01F
1
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