P25Q80H Datasheet
P25Q80H
Ultra Low Power, 8M-bit
Serial Multi I/O Flash Memory Datasheet
May. 30, 2017
Performance Highlight
Wide Supply Range from 2.3 to 3.6V for Read, Erase and Program
Ultra Low Power consumption for Read, Erase and Program
X1, X2 and X4 Multi I/O Support
High reliability with 100K cycling and 20 Year-retention
Puya Semiconductor (Shanghai) Co., Ltd
Puya Semiconductor
Page 1 of 71
P25Q80H Datasheet
Contents
1
2
3
Overview ........................................................................................................................................................4
Description .....................................................................................................................................................5
Pin Definition .................................................................................................................................................6
3.1
Pin Configurations .............................................................................................................................6
3.2
Pin Descriptions .................................................................................................................................6
4 Block Diagram ...............................................................................................................................................7
5 Electrical Specifications .................................................................................................................................8
5.1
Absolute Maximum Ratings ...............................................................................................................8
5.2
DC Characteristics .............................................................................................................................9
5.3
AC Characteristics .......................................................................................................................... 10
5.4
AC Characteristics for Program and Erase ..................................................................................... 11
5.5
Operation Conditions ...................................................................................................................... 13
6 Data Protection ........................................................................................................................................... 15
7 Memory Address Mapping .......................................................................................................................... 17
8 Device Operation ........................................................................................................................................ 18
9 Hold Feature ............................................................................................................................................... 20
10
Commands ......................................................................................................................................... 21
10.1 Commands listing ........................................................................................................................... 21
10.2 Write Enable (WREN) ..................................................................................................................... 24
10.3 Write Disable (WRDI) ....................................................................................................................... 24
10.4 Write Enable for Volatile Status Register ....................................................................................... 25
10.5 Read Status Register (RDSR) .......................................................................................................... 25
10.6 Read Configure Register (RDCR) .................................................................................................... 28
10.7 Active Status Interrupt (ASI) ........................................................................................................... 29
10.8 Write Status Register (WRSR) ......................................................................................................... 29
10.9 Write Configure Register (WRCR) .................................................................................................... 30
10.10 Read Data Bytes (READ) ................................................................................................................. 31
10.11 Read Data Bytes at Higher Speed (FAST_READ) ............................................................................ 32
10.12 Dual Read Mode (DREAD) .............................................................................................................. 33
10.13 2 X IO Read Mode (2READ) ............................................................................................................ 34
10.14 2 X IO Read Performer Enhance Mode ............................................................................................ 35
10.15 Quad Read Mode (QREAD) ............................................................................................................. 36
10.16 4 X IO Read Mode (4READ) ............................................................................................................ 37
10.17 4 X IO Read Performance Enhance Mode ....................................................................................... 38
10.18 Burst Read....................................................................................................................................... 39
10.19 Page Erase (PE) .............................................................................................................................. 40
10.20 Sector Erase (SE) ............................................................................................................................ 40
10.21 Block Erase (BE32K) ....................................................................................................................... 41
10.22 Block Erase (BE).............................................................................................................................. 41
10.23 Chip Erase (CE) ............................................................................................................................... 42
10.24 Page Program (PP).......................................................................................................................... 43
10.25 Dual Input Page Program (DPP) ...................................................................................................... 44
10.26 Quad Page Program (QPP) ............................................................................................................. 45
10.27 Erase Security Registers (ERSCUR) ................................................................................................ 46
10.28 Program Security Registers (PRSCUR) ........................................................................................... 47
10.29 Read Security Registers (RDSCUR) ................................................................................................ 48
10.30 Deep Power-down (DP) ................................................................................................................... 49
10.31 Release form Deep Power-Down (RDP), Read Electronic Signature (RES) ...................................... 49
10.32 Read Electronic Manufacturer ID & Device ID (REMS) ..................................................................... 51
10.33 Dual I/O Read Electronic Manufacturer ID & Device ID (DREMS) .................................................... 52
Puya Semiconductor
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P25Q80H Datasheet
10.34 Quad I/O Read Electronic Manufacturer ID & Device ID (QREMS)................................................... 53
10.35 Read Identification (RDID)................................................................................................................ 54
10.36 Program/Erase Suspend/Resume .................................................................................................... 55
10.37 Erase Suspend to Program .............................................................................................................. 56
10.38 Program Resume and Erase Resume .............................................................................................. 57
10.39 No Operation (NOP) ........................................................................................................................ 57
10.40 Software Reset (RSTEN/RST) ......................................................................................................... 58
10.41 Read Unique ID (RUID) ................................................................................................................... 59
10.42 Read SFDP Mode (RDSFDP) .......................................................................................................... 60
11
Ordering Information........................................................................................................................... 65
12
Package Information........................................................................................................................... 66
12.1 8-Lead SOP(150mil) ....................................................................................................................... 66
12.2 8-Lead SOP(200mil) ....................................................................................................................... 67
12.3 8-Lead TSSOP ............................................................................................................................... 68
12.4 8-Land USON(3x2mm) ................................................................................................................... 69
12.5 8-Land WSON(6x5mm) .................................................................................................................. 70
13
Revision History.................................................................................................................................. 71
Puya Semiconductor
Page 3 of 71
P25Q80H Datasheet
1 Overview
General
Single 2.3V to 3.60V supply
Industrial Temperature Range -40C to 85C
Serial Peripheral Interface (SPI) Compatible: Mode 0 and Mode 3
Single, Dual and Quad IO mode
-
-
-
-
-
-
-
-
8M x 1 bit
4M x 2 bits
2M x 4 bits
Uniform 256-byte
Uniform 256-byte
Uniform 4K-byte
Full Chip Erase
Page Program
Page Erase
Sector Erase
Flexible Architecture for Code and Data Storage
Uniform 32K/64K-byte Block Erase
Hardware Controlled Locking of Protected Sectors by WP Pin
One Time Programmable (OTP) Security Register
-
3*512-Byte Security Registers With OTP Lock
128 bit unique ID for each device
Fast Program and Erase Speed
-
-
-
-
-
2ms
8ms
8ms
8ms
8ms
Page program time
Page erase time
4K-byte sector erase time
32K-byte block erase time
64K-byte block erase time
JEDEC Standard Manufacturer and Device ID Read Methodology
Ultra Low Power Consumption
-
-
-
-
0.6uA
9uA
2.5mA
3.0mA
Deep Power Down current
Standby current
Active Read current at 33MHz
Active Program or Erase current
High Reliability
-
-
100,000 Program / Erase Cycles
20-year Data Retention
8-pin
8-land
8-land
8-pin
WLCSP
KGD for SiP
SOP (150mil/200mil)
USON (2x3mm)
WSON (6x5mm)
TSSOP
Industry Standard Green Package Options
-
-
-
-
-
-
Puya Semiconductor
Page 4 of 71
P25Q80H Datasheet
2 Description
The P25Q80H is a serial interface Flash memory device designed for use in a wide variety of high-volume
consumer based applications in which program code is shadowed from Flash memory into embedded or
external RAM for execution. The flexible erase architecture of the device, with its page erase granularity it is
ideal for data storage as well, eliminating the need for additional data storage devices.
The erase block sizes of the device have been optimized to meet the needs of today's code and data storage
applications. By optimizing the size of the erase blocks, the memory space can be used much more efficiently.
Because certain code modules and data storage segments must reside by themselves in their own erase
regions, the wasted and unused memory space that occurs with large sectored and large block erase Flash
memory devices can be greatly reduced. This increased memory space efficiency allows additional code
routines and data storage segments to be added while still maintaining the same overall device density.
The device also contains an additional 3*512-byte security registers with OTP lock (One-Time
Programmable), can be used for purposes such as unique device serialization, system-level Electronic Serial
Number (ESN) storage, locked key storage, etc.
Specifically designed for use in many different systems, the device supports read, program, and erase
operations with a wide supply voltage range of 2.3V to 3.6V. No separate voltage is required for programming
and erasing.
Puya Semiconductor
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